80267f8148
The recently announced IBM z17 processor implements the architecture already supported as "arch15" in LLVM. This patch adds support for "z17" as an alternate architecture name for arch15. This patch also add the scheduler description for the z17 processor, provided by Jonas Paulsson.
33 lines
924 B
LLVM
33 lines
924 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; Test 128-bit multiplication in vector registers on z17
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z17 | FileCheck %s
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; Multiplication.
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define i128 @f1(i128 %a, i128 %b) {
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; CHECK-LABEL: f1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r4), 3
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; CHECK-NEXT: vl %v1, 0(%r3), 3
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; CHECK-NEXT: vmlq %v0, %v1, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%res = mul i128 %a, %b
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ret i128 %res
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}
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; Multiply-and-add.
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define i128 @f2(i128 %a, i128 %b, i128 %add) {
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; CHECK-LABEL: f2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r5), 3
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; CHECK-NEXT: vl %v1, 0(%r4), 3
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; CHECK-NEXT: vl %v2, 0(%r3), 3
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; CHECK-NEXT: vmalq %v0, %v2, %v1, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%mul = mul i128 %a, %b
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%res = add i128 %mul, %add
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ret i128 %res
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}
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