llvm-project/llvm/test/Transforms/SLPVectorizer/X86/revec-getAltInstrMask.ll
Han-Kuan Chen 2347aa1fcc
[SLP][REVEC] Fix the mismatch between the result of getAltInstrMask and the VecTy argument of TargetTransformInfo::isLegalAltInstr. (#134795)
We cannot determine ScalarTy from VL because some ScalarTy is determined
from VL[0]->getType(), while others are determined from
getValueType(VL[0]).

Fix "Mask and VecTy are incompatible".
2025-04-08 22:29:11 +08:00

48 lines
2.5 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -mtriple=x86_64-unknown-linux-gnu -mattr=+avx -passes=slp-vectorizer -S -slp-revec %s | FileCheck %s
define i32 @test() {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr null, align 1
; CHECK-NEXT: [[WIDE_LOAD136:%.*]] = load <16 x i8>, ptr null, align 1
; CHECK-NEXT: [[WIDE_LOAD137:%.*]] = load <16 x i8>, ptr null, align 1
; CHECK-NEXT: [[WIDE_LOAD138:%.*]] = load <16 x i8>, ptr null, align 1
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> zeroinitializer, i8 0, i64 0
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> zeroinitializer, i8 0, i64 0
; CHECK-NEXT: [[TMP2:%.*]] = or <16 x i8> [[WIDE_LOAD]], zeroinitializer
; CHECK-NEXT: [[TMP3:%.*]] = or <16 x i8> [[WIDE_LOAD136]], zeroinitializer
; CHECK-NEXT: [[TMP4:%.*]] = or <16 x i8> [[WIDE_LOAD137]], zeroinitializer
; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i8> [[WIDE_LOAD138]], zeroinitializer
; CHECK-NEXT: [[TMP6:%.*]] = icmp ult <16 x i8> [[TMP2]], zeroinitializer
; CHECK-NEXT: [[TMP7:%.*]] = icmp ult <16 x i8> [[TMP3]], zeroinitializer
; CHECK-NEXT: [[TMP8:%.*]] = icmp ult <16 x i8> [[TMP4]], zeroinitializer
; CHECK-NEXT: [[TMP9:%.*]] = icmp ult <16 x i8> [[TMP5]], zeroinitializer
; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i8> [[TMP0]], zeroinitializer
; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i8> [[TMP1]], zeroinitializer
; CHECK-NEXT: [[TMP12:%.*]] = icmp ult <16 x i8> [[TMP10]], zeroinitializer
; CHECK-NEXT: [[TMP13:%.*]] = icmp ult <16 x i8> [[TMP11]], zeroinitializer
; CHECK-NEXT: ret i32 0
;
entry:
%wide.load = load <16 x i8>, ptr null, align 1
%wide.load136 = load <16 x i8>, ptr null, align 1
%wide.load137 = load <16 x i8>, ptr null, align 1
%wide.load138 = load <16 x i8>, ptr null, align 1
%0 = insertelement <16 x i8> zeroinitializer, i8 0, i64 0
%1 = insertelement <16 x i8> zeroinitializer, i8 0, i64 0
%2 = or <16 x i8> %wide.load, zeroinitializer
%3 = or <16 x i8> %wide.load136, zeroinitializer
%4 = or <16 x i8> %wide.load137, zeroinitializer
%5 = or <16 x i8> %wide.load138, zeroinitializer
%6 = icmp ult <16 x i8> %2, zeroinitializer
%7 = icmp ult <16 x i8> %3, zeroinitializer
%8 = icmp ult <16 x i8> %4, zeroinitializer
%9 = icmp ult <16 x i8> %5, zeroinitializer
%10 = or <16 x i8> %0, zeroinitializer
%11 = or <16 x i8> %1, zeroinitializer
%12 = icmp ult <16 x i8> %10, zeroinitializer
%13 = icmp ult <16 x i8> %11, zeroinitializer
ret i32 0
}