921d43fbb2
This patch fills holes in executable sections with 0xd4 (ARM) or 0xef (MIPS). These trap instructions were suggested by Theo de Raadt. llvm-svn: 306322
365 lines
11 KiB
C++
365 lines
11 KiB
C++
//===- X86.cpp ------------------------------------------------------------===//
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//
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// The LLVM Linker
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "Error.h"
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#include "InputFiles.h"
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#include "Symbols.h"
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#include "SyntheticSections.h"
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#include "Target.h"
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#include "llvm/Support/Endian.h"
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using namespace llvm;
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using namespace llvm::support::endian;
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using namespace llvm::ELF;
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using namespace lld;
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using namespace lld::elf;
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namespace {
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class X86 final : public TargetInfo {
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public:
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X86();
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RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
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const uint8_t *Loc) const override;
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int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
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void writeGotPltHeader(uint8_t *Buf) const override;
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uint32_t getDynRel(uint32_t Type) const override;
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void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
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void writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const override;
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void writePltHeader(uint8_t *Buf) const override;
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void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
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int32_t Index, unsigned RelOff) const override;
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void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
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RelExpr Expr) const override;
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void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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void relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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};
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} // namespace
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X86::X86() {
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GotBaseSymOff = -1;
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CopyRel = R_386_COPY;
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GotRel = R_386_GLOB_DAT;
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PltRel = R_386_JUMP_SLOT;
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IRelativeRel = R_386_IRELATIVE;
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RelativeRel = R_386_RELATIVE;
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TlsGotRel = R_386_TLS_TPOFF;
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TlsModuleIndexRel = R_386_TLS_DTPMOD32;
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TlsOffsetRel = R_386_TLS_DTPOFF32;
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GotEntrySize = 4;
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GotPltEntrySize = 4;
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PltEntrySize = 16;
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PltHeaderSize = 16;
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TlsGdRelaxSkip = 2;
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TrapInstr = 0xcccccccc; // 0xcc = INT3
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}
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RelExpr X86::getRelExpr(uint32_t Type, const SymbolBody &S,
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const uint8_t *Loc) const {
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switch (Type) {
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case R_386_8:
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case R_386_16:
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case R_386_32:
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case R_386_TLS_LDO_32:
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return R_ABS;
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case R_386_TLS_GD:
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return R_TLSGD;
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case R_386_TLS_LDM:
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return R_TLSLD;
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case R_386_PLT32:
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return R_PLT_PC;
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case R_386_PC8:
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case R_386_PC16:
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case R_386_PC32:
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return R_PC;
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case R_386_GOTPC:
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return R_GOTONLY_PC_FROM_END;
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case R_386_TLS_IE:
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return R_GOT;
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case R_386_GOT32:
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case R_386_GOT32X:
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// These relocations can be calculated in two different ways.
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// Usual calculation is G + A - GOT what means an offset in GOT table
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// (R_GOT_FROM_END). When instruction pointed by relocation has no base
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// register, then relocations can be used when PIC code is disabled. In that
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// case calculation is G + A, it resolves to an address of entry in GOT
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// (R_GOT) and not an offset.
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//
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// To check that instruction has no base register we scan ModR/M byte.
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// See "Table 2-2. 32-Bit Addressing Forms with the ModR/M Byte"
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// (http://www.intel.com/content/dam/www/public/us/en/documents/manuals/
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// 64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf)
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if ((Loc[-1] & 0xc7) != 0x5)
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return R_GOT_FROM_END;
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if (Config->Pic)
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error(toString(S.File) + ": relocation " + toString(Type) + " against '" +
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S.getName() +
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"' without base register can not be used when PIC enabled");
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return R_GOT;
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case R_386_TLS_GOTIE:
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return R_GOT_FROM_END;
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case R_386_GOTOFF:
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return R_GOTREL_FROM_END;
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case R_386_TLS_LE:
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return R_TLS;
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case R_386_TLS_LE_32:
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return R_NEG_TLS;
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case R_386_NONE:
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return R_NONE;
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default:
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error(toString(S.File) + ": unknown relocation type: " + toString(Type));
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return R_HINT;
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}
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}
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RelExpr X86::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
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RelExpr Expr) const {
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switch (Expr) {
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default:
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return Expr;
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case R_RELAX_TLS_GD_TO_IE:
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return R_RELAX_TLS_GD_TO_IE_END;
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case R_RELAX_TLS_GD_TO_LE:
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return R_RELAX_TLS_GD_TO_LE_NEG;
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}
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}
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void X86::writeGotPltHeader(uint8_t *Buf) const {
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write32le(Buf, InX::Dynamic->getVA());
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}
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void X86::writeGotPlt(uint8_t *Buf, const SymbolBody &S) const {
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// Entries in .got.plt initially points back to the corresponding
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// PLT entries with a fixed offset to skip the first instruction.
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write32le(Buf, S.getPltVA() + 6);
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}
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void X86::writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const {
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// An x86 entry is the address of the ifunc resolver function.
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write32le(Buf, S.getVA());
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}
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uint32_t X86::getDynRel(uint32_t Type) const {
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if (Type == R_386_TLS_LE)
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return R_386_TLS_TPOFF;
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if (Type == R_386_TLS_LE_32)
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return R_386_TLS_TPOFF32;
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return Type;
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}
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void X86::writePltHeader(uint8_t *Buf) const {
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if (Config->Pic) {
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const uint8_t V[] = {
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0xff, 0xb3, 0x04, 0x00, 0x00, 0x00, // pushl GOTPLT+4(%ebx)
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0xff, 0xa3, 0x08, 0x00, 0x00, 0x00, // jmp *GOTPLT+8(%ebx)
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0x90, 0x90, 0x90, 0x90 // nop
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};
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memcpy(Buf, V, sizeof(V));
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uint32_t Ebx = InX::Got->getVA() + InX::Got->getSize();
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uint32_t GotPlt = InX::GotPlt->getVA() - Ebx;
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write32le(Buf + 2, GotPlt + 4);
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write32le(Buf + 8, GotPlt + 8);
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return;
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}
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const uint8_t PltData[] = {
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0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushl (GOTPLT+4)
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0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *(GOTPLT+8)
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0x90, 0x90, 0x90, 0x90 // nop
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};
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memcpy(Buf, PltData, sizeof(PltData));
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uint32_t GotPlt = InX::GotPlt->getVA();
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write32le(Buf + 2, GotPlt + 4);
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write32le(Buf + 8, GotPlt + 8);
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}
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void X86::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
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uint64_t PltEntryAddr, int32_t Index,
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unsigned RelOff) const {
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const uint8_t Inst[] = {
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0xff, 0x00, 0x00, 0x00, 0x00, 0x00, // jmp *foo_in_GOT|*foo@GOT(%ebx)
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0x68, 0x00, 0x00, 0x00, 0x00, // pushl $reloc_offset
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0xe9, 0x00, 0x00, 0x00, 0x00 // jmp .PLT0@PC
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};
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memcpy(Buf, Inst, sizeof(Inst));
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if (Config->Pic) {
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// jmp *foo@GOT(%ebx)
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uint32_t Ebx = InX::Got->getVA() + InX::Got->getSize();
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Buf[1] = 0xa3;
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write32le(Buf + 2, GotPltEntryAddr - Ebx);
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} else {
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// jmp *foo_in_GOT
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Buf[1] = 0x25;
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write32le(Buf + 2, GotPltEntryAddr);
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}
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write32le(Buf + 7, RelOff);
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write32le(Buf + 12, -Index * PltEntrySize - PltHeaderSize - 16);
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}
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int64_t X86::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
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switch (Type) {
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default:
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return 0;
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case R_386_8:
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case R_386_PC8:
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return SignExtend64<8>(*Buf);
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case R_386_16:
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case R_386_PC16:
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return SignExtend64<16>(read16le(Buf));
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case R_386_32:
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case R_386_GOT32:
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case R_386_GOT32X:
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case R_386_GOTOFF:
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case R_386_GOTPC:
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case R_386_PC32:
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case R_386_PLT32:
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case R_386_TLS_LDO_32:
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case R_386_TLS_LE:
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return SignExtend64<32>(read32le(Buf));
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}
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}
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void X86::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
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// R_386_{PC,}{8,16} are not part of the i386 psABI, but they are
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// being used for some 16-bit programs such as boot loaders, so
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// we want to support them.
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switch (Type) {
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case R_386_8:
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checkUInt<8>(Loc, Val, Type);
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*Loc = Val;
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break;
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case R_386_PC8:
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checkInt<8>(Loc, Val, Type);
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*Loc = Val;
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break;
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case R_386_16:
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checkUInt<16>(Loc, Val, Type);
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write16le(Loc, Val);
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break;
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case R_386_PC16:
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// R_386_PC16 is normally used with 16 bit code. In that situation
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// the PC is 16 bits, just like the addend. This means that it can
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// point from any 16 bit address to any other if the possibility
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// of wrapping is included.
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// The only restriction we have to check then is that the destination
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// address fits in 16 bits. That is impossible to do here. The problem is
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// that we are passed the final value, which already had the
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// current location subtracted from it.
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// We just check that Val fits in 17 bits. This misses some cases, but
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// should have no false positives.
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checkInt<17>(Loc, Val, Type);
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write16le(Loc, Val);
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break;
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default:
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checkInt<32>(Loc, Val, Type);
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write32le(Loc, Val);
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}
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}
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void X86::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
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// Convert
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// leal x@tlsgd(, %ebx, 1),
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// call __tls_get_addr@plt
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// to
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// movl %gs:0,%eax
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// subl $x@ntpoff,%eax
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const uint8_t Inst[] = {
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0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax
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0x81, 0xe8, 0x00, 0x00, 0x00, 0x00 // subl 0(%ebx), %eax
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};
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memcpy(Loc - 3, Inst, sizeof(Inst));
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write32le(Loc + 5, Val);
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}
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void X86::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
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// Convert
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// leal x@tlsgd(, %ebx, 1),
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// call __tls_get_addr@plt
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// to
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// movl %gs:0, %eax
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// addl x@gotntpoff(%ebx), %eax
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const uint8_t Inst[] = {
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0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax
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0x03, 0x83, 0x00, 0x00, 0x00, 0x00 // addl 0(%ebx), %eax
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};
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memcpy(Loc - 3, Inst, sizeof(Inst));
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write32le(Loc + 5, Val);
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}
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// In some conditions, relocations can be optimized to avoid using GOT.
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// This function does that for Initial Exec to Local Exec case.
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void X86::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
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// Ulrich's document section 6.2 says that @gotntpoff can
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// be used with MOVL or ADDL instructions.
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// @indntpoff is similar to @gotntpoff, but for use in
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// position dependent code.
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uint8_t Reg = (Loc[-1] >> 3) & 7;
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if (Type == R_386_TLS_IE) {
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if (Loc[-1] == 0xa1) {
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// "movl foo@indntpoff,%eax" -> "movl $foo,%eax"
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// This case is different from the generic case below because
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// this is a 5 byte instruction while below is 6 bytes.
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Loc[-1] = 0xb8;
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} else if (Loc[-2] == 0x8b) {
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// "movl foo@indntpoff,%reg" -> "movl $foo,%reg"
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Loc[-2] = 0xc7;
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Loc[-1] = 0xc0 | Reg;
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} else {
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// "addl foo@indntpoff,%reg" -> "addl $foo,%reg"
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Loc[-2] = 0x81;
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Loc[-1] = 0xc0 | Reg;
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}
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} else {
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assert(Type == R_386_TLS_GOTIE);
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if (Loc[-2] == 0x8b) {
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// "movl foo@gottpoff(%rip),%reg" -> "movl $foo,%reg"
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Loc[-2] = 0xc7;
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Loc[-1] = 0xc0 | Reg;
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} else {
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// "addl foo@gotntpoff(%rip),%reg" -> "leal foo(%reg),%reg"
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Loc[-2] = 0x8d;
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Loc[-1] = 0x80 | (Reg << 3) | Reg;
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}
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}
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write32le(Loc, Val);
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}
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void X86::relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
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if (Type == R_386_TLS_LDO_32) {
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write32le(Loc, Val);
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return;
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}
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// Convert
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// leal foo(%reg),%eax
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// call ___tls_get_addr
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// to
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// movl %gs:0,%eax
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// nop
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// leal 0(%esi,1),%esi
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const uint8_t Inst[] = {
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0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0,%eax
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0x90, // nop
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0x8d, 0x74, 0x26, 0x00 // leal 0(%esi,1),%esi
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};
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memcpy(Loc - 2, Inst, sizeof(Inst));
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}
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TargetInfo *elf::getX86TargetInfo() {
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static X86 Target;
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return &Target;
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}
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