Joe Nash 70e7a1257c [AMDGPU][NFC] Allow separate RC for VOP3 DPP Dst ...

Create a field in VOPProfile called DstRCVOP3DPP to allow the VOP3
versions of DPP instructions to have a different destination register
class than the non-VOP3 encoding. NFC for current instructions, but
planned to be functional in upcoming ones.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D132673

2022-08-29 11:22:07 -04:00

..

AsmParser

[AMDGPU][MC] Verify selection of LDS MUBUF opcodes

2022-08-01 16:44:39 +03:00

Disassembler

[AMDGPU][MC][GFX940] Correct disassembly of MFMA opcodes

2022-08-01 16:00:47 +03:00

MCA

[MCA] Introducing incremental SourceMgr and resumable pipeline

2022-06-24 15:39:51 -07:00

MCTargetDesc

[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC

2022-08-08 11:24:15 -07:00

TargetInfo

Fix shlib builds for all lib/Target/*/TargetInfo libs

2021-10-08 15:21:13 -07:00

Utils

[llvm] Qualify auto (NFC)

2022-08-07 23:55:27 -07:00

AMDGPU.h

[AMDGPU] gfx11 Generate VOPD Instructions

2022-07-05 09:18:19 -04:00

AMDGPU.td

[AMDGPU] Omit unnecessary waitcnt before barriers

2022-07-29 11:12:36 -07:00

AMDGPUAliasAnalysis.cpp

[NFC][AMDGPU] Reduce includes dependencies, part 2

2021-10-01 17:50:20 +03:00

AMDGPUAliasAnalysis.h

[Target] Remove redundant member initialization (NFC)

2022-01-06 22:01:44 -08:00

AMDGPUAlwaysInlinePass.cpp

[HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols

2021-10-18 16:53:15 -06:00

AMDGPUAnnotateKernelFeatures.cpp

[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.

2021-09-20 14:48:50 -07:00

AMDGPUAnnotateUniformValues.cpp

[AMDGPU] Return better Changed status from AMDGPUAnnotateUniformValues

2022-02-17 09:31:42 +00:00

AMDGPUArgumentUsageInfo.cpp

[amdgpu] Implement lds kernel id intrinsic

2022-07-19 17:46:19 +01:00

AMDGPUArgumentUsageInfo.h

[amdgpu] Implement lds kernel id intrinsic

2022-07-19 17:46:19 +01:00

AMDGPUAsmPrinter.cpp

[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC

2022-08-08 11:24:15 -07:00

AMDGPUAsmPrinter.h

[AMDGPU] Add remarks to output some resource usage

2022-07-15 11:01:53 -07:00

AMDGPUAtomicOptimizer.cpp

[AMDGPU] Add GFX11 llvm.amdgcn.permlane64 intrinsic

2022-06-13 21:12:11 +01:00

AMDGPUAttributes.def

[amdgpu] Implement lds kernel id intrinsic

2022-07-19 17:46:19 +01:00

AMDGPUAttributor.cpp

[Attributor] Replace AAValueSimplify with AAPotentialValues

2022-07-19 16:24:42 -05:00

AMDGPUCallingConv.td

[AMDGPU][NFC] Refactor AMDGPUCallingConv.td

2022-06-01 16:24:09 +00:00

AMDGPUCallLowering.cpp

Use value instead of getValue (NFC)

2022-07-19 21:18:26 -07:00

AMDGPUCallLowering.h

AMDGPU/GlobalISel: Redo kernel argument load handling

2021-07-16 08:56:54 -04:00

AMDGPUCodeGenPrepare.cpp

[AMDGPUCodeGenPrepare] Check result of ConstantFoldBinaryOpOperands()

2022-07-04 14:20:23 +02:00

AMDGPUCombine.td

AMDGPU/GlobalISel: Add clamp combine

2021-12-03 12:49:39 +01:00

AMDGPUCombinerHelper.cpp

[AMDGPU][GlobalISel] Fix insert point in FoldableFneg combine

2022-02-11 12:09:40 +01:00

AMDGPUCombinerHelper.h

[AMDGPU][GlobalISel] Fold G_FNEG above when users cannot fold mods

2021-11-17 14:25:13 +01:00

AMDGPUCtorDtorLowering.cpp

AMDGPU: Don't crash on global_ctor/dtor declaration

2022-06-23 21:04:54 +08:00

AMDGPUExportClustering.cpp

[llvm] Use = default (NFC)

2022-02-06 22:18:35 -08:00

AMDGPUExportClustering.h

…

AMDGPUFeatures.td

AMDGPU: Remove FeatureLocalMemorySize0

2021-09-02 22:43:01 -04:00

AMDGPUFrameLowering.cpp

[NFC][AMDGPU] Fix typo.

2022-08-20 08:30:42 +02:00

AMDGPUFrameLowering.h

…

AMDGPUGenRegisterBankInfo.def

…

AMDGPUGISel.td

[AMDGPU][CodeGen] Support (register + immediate) SMRD offsets.

2022-07-18 11:29:31 +01:00

AMDGPUGlobalISelUtils.cpp

[AMDGPU] gfx11 Select on Buffer Atomic FAdd Rtn type

2022-06-23 11:05:32 -04:00

AMDGPUGlobalISelUtils.h

[AMDGPU] gfx11 Select on Buffer Atomic FAdd Rtn type

2022-06-23 11:05:32 -04:00

AMDGPUHSAMetadataStreamer.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 10:41:50 -07:00

AMDGPUHSAMetadataStreamer.h

[llvm] Use = default (NFC)

2022-02-06 22:18:35 -08:00

AMDGPUIGroupLP.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 10:41:50 -07:00

AMDGPUIGroupLP.h

[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy

2022-08-19 15:38:36 -07:00

AMDGPUInsertDelayAlu.cpp

[AMDGPU] New AMDGPUInsertDelayAlu pass

2022-06-29 21:30:20 +01:00

AMDGPUInstCombineIntrinsic.cpp

[AMDGPU] Add new GFX11 intrinsic llvm.amdgcn.exp.row

2022-06-16 18:23:14 +01:00

AMDGPUInstrInfo.cpp

…

AMDGPUInstrInfo.h

[AMDGPU] Fix LOD bias in A16 combine

2022-01-21 12:09:06 +01:00

AMDGPUInstrInfo.td

[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range

2022-03-09 12:18:02 +05:30

AMDGPUInstructions.td

[AMDGPU] Use the HasNoUse predicate for no-ret atomic op selection

2022-07-08 09:47:33 +05:30

AMDGPUInstructionSelector.cpp

[AMDGPU][GISel] Enable Selection of ADD3 for G_PTR_ADD

2022-08-24 14:44:19 +00:00

AMDGPUInstructionSelector.h

[AMDGPU][CodeGen] Support (register + immediate) SMRD offsets.

2022-07-18 11:29:31 +01:00

AMDGPUISelDAGToDAG.cpp

[AMDGPU] Detect uniformness of TID / wavefrontsize

2022-08-26 23:26:08 -07:00

AMDGPUISelDAGToDAG.h

[AMDGPU][CodeGen] Support (register + immediate) SMRD offsets.

2022-07-18 11:29:31 +01:00

AMDGPUISelLowering.cpp

[X86] Promote i8/i16 CTTZ (BSF) instructions and remove speculation branch

2022-08-24 17:28:18 +01:00

AMDGPUISelLowering.h

[X86] Promote i8/i16 CTTZ (BSF) instructions and remove speculation branch

2022-08-24 17:28:18 +01:00

AMDGPULateCodeGenPrepare.cpp

[AArch64, AMDGPU] Use make_early_inc_range (NFC)

2021-11-03 09:22:51 -07:00

AMDGPULegalizerInfo.cpp

Use value instead of getValue (NFC)

2022-07-19 21:18:26 -07:00

AMDGPULegalizerInfo.h

[amdgpu] Implement lds kernel id intrinsic

2022-07-19 17:46:19 +01:00

AMDGPULibCalls.cpp

[AMDGPU] Remove a redundant variable (NFC)

2022-07-23 12:29:05 -07:00

AMDGPULibFunc.cpp

Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"

2022-01-26 16:55:53 +01:00

AMDGPULibFunc.h

[llvm] Use = default (NFC)

2022-02-06 22:18:35 -08:00

AMDGPULowerIntrinsics.cpp

[iwyu] Handle regressions in libLLVM header include

2022-05-04 08:32:38 +02:00

AMDGPULowerKernelArguments.cpp

[NFC] Simplify code

2022-06-20 15:15:52 +00:00

AMDGPULowerKernelAttributes.cpp

AMDGPU: Update reqd-work-group-size optimization for umin intrinsic

2022-04-12 20:03:02 -04:00

AMDGPULowerModuleLDSPass.cpp

[amdgpu][nfc] Fix build with a certan Clang version

2022-07-27 17:29:36 +02:00

AMDGPUMachineCFGStructurizer.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 10:41:50 -07:00

AMDGPUMachineFunction.cpp

[amdgpu] Implement lds kernel id intrinsic

2022-07-19 17:46:19 +01:00

AMDGPUMachineFunction.h

[amdgpu] Implement lds kernel id intrinsic

2022-07-19 17:46:19 +01:00

AMDGPUMachineModuleInfo.cpp

Cleanup codegen includes

2022-03-16 08:43:00 +01:00

AMDGPUMachineModuleInfo.h

[llvm] Use value instead of getValue (NFC)

2022-07-13 23:11:56 -07:00

AMDGPUMacroFusion.cpp

…

AMDGPUMacroFusion.h

…

AMDGPUMCInstLower.cpp

[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy

2022-08-19 15:38:36 -07:00

AMDGPUMCInstLower.h

AMDGPU: Fix missing c++ mode comment

2022-06-01 21:14:48 -04:00

AMDGPUMIRFormatter.cpp

CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine

2022-06-01 09:45:40 -04:00

AMDGPUMIRFormatter.h

[llvm] Remove redundaunt virtual specifiers (NFC)

2022-07-24 21:50:35 -07:00

AMDGPUOpenCLEnqueuedBlockLowering.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 10:41:50 -07:00

AMDGPUPerfHintAnalysis.cpp

[AMDGPU] Set amdgpu-memory-bound if a basic block has dense global memory access

2022-07-19 15:16:28 +05:30

AMDGPUPerfHintAnalysis.h

[AMDGPU] Set amdgpu-memory-bound if a basic block has dense global memory access

2022-07-19 15:16:28 +05:30

AMDGPUPostLegalizerCombiner.cpp

Code quality: Combine V_RSQ

2021-11-30 17:17:15 +01:00

AMDGPUPreLegalizerCombiner.cpp

[llvm] Remove redundaunt virtual specifiers (NFC)

2022-07-24 21:50:35 -07:00

AMDGPUPrintfRuntimeBinding.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 10:41:50 -07:00

AMDGPUPromoteAlloca.cpp

Use llvm::less_second (NFC)

2022-06-04 22:48:32 -07:00

AMDGPUPromoteKernelArguments.cpp

[AMDGPU] Set noclobber metadata on loads instead of cast to constant

2022-03-07 23:13:02 -08:00

AMDGPUPropagateAttributes.cpp

AMDGPU: Use attributor to propagate amdgpu-flat-work-group-size

2021-10-22 16:23:50 -04:00

AMDGPUPTNote.h

[NFC] Fix endif comments to match with include guard

2022-01-07 15:52:59 +08:00

AMDGPURegBankCombiner.cpp

[AMDGPU][GlobalISel] Fix subtarget checks for combining to v_med3_i16

2022-07-21 11:41:31 +01:00

AMDGPURegisterBankInfo.cpp

[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC

2022-08-08 11:24:15 -07:00

AMDGPURegisterBankInfo.h

AMDGPU: Add G_AMDGPU_MAD_64_32 instructions

2022-05-27 12:36:17 -05:00

AMDGPURegisterBanks.td

[AMDGPU] Add 224-bit vector types and link 192-bit types to MVTs

2021-06-24 12:41:22 +09:00

AMDGPUReleaseVGPRs.cpp

[AMDGPU] GFX11: automatically release VGPRs at the end of the shader

2022-06-30 20:55:14 +01:00

AMDGPUReplaceLDSUseWithPointer.cpp

[nfc][amdgpu] LDS. Move selection logic up the stack.

2022-07-19 17:20:19 +01:00

AMDGPUResourceUsageAnalysis.cpp

AMDGPU: Fix assertion when printing unreachable functions

2022-07-29 08:57:43 -04:00

AMDGPUResourceUsageAnalysis.h

AMDGPU: Convert AMDGPUResourceUsageAnalysis to a Module pass

2022-02-04 15:56:04 -05:00

AMDGPURewriteOutArguments.cpp

Revert "[llvm] Use llvm::is_contained (NFC)"

2022-08-28 18:52:49 -07:00

AMDGPUSearchableTables.td

[AMDGPU] Support for gfx940 fp8 smfmac

2022-07-18 12:12:41 -07:00

AMDGPUSetWavePriority.cpp

[AMDGPU] Adjust wave priority based on VMEM instructions to avoid duty-cycling.

2022-04-27 14:37:18 +01:00

AMDGPUSubtarget.cpp

[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC

2022-08-08 11:24:15 -07:00

AMDGPUSubtarget.h

[AMDGPU] gfx11 subtarget features & early tests

2022-05-11 10:31:49 -04:00

AMDGPUTargetMachine.cpp

[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy

2022-08-19 15:38:36 -07:00

AMDGPUTargetMachine.h

CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine

2022-06-01 09:45:40 -04:00

AMDGPUTargetObjectFile.cpp

…

AMDGPUTargetObjectFile.h

…

AMDGPUTargetTransformInfo.cpp

[AMDGPU] Detect uniformness of TID / wavefrontsize

2022-08-26 23:26:08 -07:00

AMDGPUTargetTransformInfo.h

[TTI] Use OperandValueInfo in getArithmeticInstrCost implementation [NFC]

2022-08-22 15:16:39 -07:00

AMDGPUUnifyDivergentExitNodes.cpp

[AMDGPU] Unify unreachable intrinsics

2022-08-09 10:23:32 -04:00

AMDGPUUnifyMetadata.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 10:41:50 -07:00

AMDKernelCodeT.h

[AMDGPU][NFC] Fix typos

2022-02-18 15:05:21 +01:00

BUFInstructions.td

[AMDGPU] gfx11 allow dlc for MUBUF atomics

2022-08-01 12:18:01 +02:00

CaymanInstructions.td

Code quality: Combine V_RSQ

2021-11-30 17:17:15 +01:00

CMakeLists.txt

[AMDGPU] gfx11 Generate VOPD Instructions

2022-07-05 09:18:19 -04:00

DSInstructions.td

[AMDGPU] Use AddedComplexity for ret and noret atomic ops selection

2022-07-08 09:47:33 +05:30

EvergreenInstructions.td

Code quality: Combine V_RSQ

2021-11-30 17:17:15 +01:00

EXPInstructions.td

[AMDGPU] Add new GFX11 intrinsic llvm.amdgcn.exp.row

2022-06-16 18:23:14 +01:00

FLATInstructions.td

[AMDGPU] Use AddedComplexity for ret and noret atomic ops selection

2022-07-08 09:47:33 +05:30

GCNCreateVOPD.cpp

[AMDGPU] gfx11 Generate VOPD Instructions

2022-07-05 09:18:19 -04:00

GCNDPPCombine.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 10:41:50 -07:00

GCNHazardRecognizer.cpp

[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC

2022-08-08 11:24:15 -07:00

GCNHazardRecognizer.h

[AMDGPU] gfx11 WMMA instruction support

2022-06-30 11:13:45 -04:00

GCNILPSched.cpp

[llvm] Qualify auto in range-based for loops (NFC)

2022-08-13 12:55:42 -07:00

GCNIterativeScheduler.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 10:41:50 -07:00

GCNIterativeScheduler.h

…

GCNMinRegStrategy.cpp

[llvm] Qualify auto in range-based for loops (NFC)

2022-08-13 12:55:42 -07:00

GCNNSAReassign.cpp

[AMDGPU] GFX11 CodeGen support for MIMG instructions

2022-06-16 18:23:14 +01:00

GCNPreRAOptimizations.cpp

[AMDGPU][NFC] Fix typos

2021-11-12 11:37:21 +01:00

GCNProcessors.td

[AMDGPU] user-sgpr-init16-bug does not apply to gfx1103

2022-07-29 14:21:13 +01:00

GCNRegPressure.cpp

[NFC] Use Register instead of unsigned

2022-01-19 20:17:04 +08:00

GCNRegPressure.h

[AMDGPU][NFC] Fix typos

2022-02-18 15:05:21 +01:00

GCNSchedStrategy.cpp

[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy

2022-08-19 15:38:36 -07:00

GCNSchedStrategy.h

[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy

2022-08-19 15:38:36 -07:00

GCNSubtarget.h

[AMDGPU] Omit unnecessary waitcnt before barriers

2022-07-29 11:12:36 -07:00

GCNVOPDUtils.cpp

[AMDGPU] gfx11 Generate VOPD Instructions

2022-07-05 09:18:19 -04:00

GCNVOPDUtils.h

[AMDGPU] gfx11 Generate VOPD Instructions

2022-07-05 09:18:19 -04:00

InstCombineTables.td

…

LDSDIRInstructions.td

[AMDGPU] gfx11 ldsdir intrinsics and ISel

2022-06-17 09:03:16 -04:00

MIMGInstructions.td

[AMDGPU] Remove unused MIMG tablegen variants

2022-08-05 15:30:47 +02:00

R600.h

[AMDGPU] Rename AMDGPUCFGStructurizer to R600MachineCFGStructurizer

2022-02-18 15:08:25 +00:00

R600.td

[NFC][AMDGPU] Reduce includes dependencies.

2021-08-25 12:01:55 +03:00

R600AsmPrinter.cpp

[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC

2022-08-08 11:24:15 -07:00

R600AsmPrinter.h

…

R600ClauseMergePass.cpp

Cleanup codegen includes

2022-03-16 08:43:00 +01:00

R600ControlFlowFinalizer.cpp

[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC

2022-08-08 11:24:15 -07:00

R600Defines.h

…

R600EmitClauseMarkers.cpp

Cleanup codegen includes

2022-03-16 08:43:00 +01:00

R600ExpandSpecialInstrs.cpp

Cleanup codegen includes

2022-03-16 08:43:00 +01:00

R600FrameLowering.cpp

Cleanup codegen includes

2022-03-16 08:43:00 +01:00

R600FrameLowering.h

…

R600InstrFormats.td

…

R600InstrInfo.cpp

CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine

2022-06-01 09:45:40 -04:00

R600InstrInfo.h

CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine

2022-06-01 09:45:40 -04:00

R600InstrInfo.td

[NFC][AMDGPU] Reduce includes dependencies.

2021-08-25 12:01:55 +03:00

R600Instructions.td

Code quality: Combine V_RSQ

2021-11-30 17:17:15 +01:00

R600ISelDAGToDAG.cpp

[NFC][AMDGPU] Reduce includes dependencies, part 2

2021-10-01 17:50:20 +03:00

R600ISelLowering.cpp

[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC

2022-08-08 11:24:15 -07:00

R600ISelLowering.h

[llvm] Remove redundaunt virtual specifiers (NFC)

2022-07-24 21:50:35 -07:00

R600MachineCFGStructurizer.cpp

[AMDGPU] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds

2022-04-19 22:36:58 -07:00

R600MachineFunctionInfo.cpp

…

R600MachineFunctionInfo.h

…

R600MachineScheduler.cpp

[llvm] Use range-based for loops (NFC)

2021-12-11 11:29:12 -08:00

R600MachineScheduler.h

[AMDGPU][NFC] Fix typos

2021-11-12 11:37:21 +01:00

R600MCInstLower.cpp

[CodeGen] Move instruction predicate verification to emitInstruction

2022-07-14 09:33:28 +01:00

R600OpenCLImageTypeLoweringPass.cpp

[llvm] Use range-based for loops (NFC)

2021-12-11 11:29:12 -08:00

R600OptimizeVectorRegisters.cpp

[Target] Use range-based for loops (NFC)

2021-12-17 10:11:08 -08:00

R600Packetizer.cpp

[AMDGPU][NFC] Fix typos

2022-02-18 15:05:21 +01:00

R600Processors.td

AMDGPU: Remove FeatureLocalMemorySize0

2021-09-02 22:43:01 -04:00

R600RegisterInfo.cpp

Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"

2022-01-26 16:55:53 +01:00

R600RegisterInfo.h

…

R600RegisterInfo.td

…

R600Schedule.td

…

R600Subtarget.cpp

[AMDGPU] Use default member initializers in Subtarget classes

2022-04-12 16:42:30 +01:00

R600Subtarget.h

[AMDGPU] Use default member initializers in Subtarget classes

2022-04-12 16:42:30 +01:00

R600TargetMachine.cpp

mark getTargetTransformInfo and getTargetIRAnalysis as const

2022-02-25 14:30:44 -05:00

R600TargetMachine.h

mark getTargetTransformInfo and getTargetIRAnalysis as const

2022-02-25 14:30:44 -05:00

R600TargetTransformInfo.cpp

[NFC][AMDGPU] Reduce includes dependencies, part 2

2021-10-01 17:50:20 +03:00

R600TargetTransformInfo.h

[AArch64][TTI][NFC] Overload method 'getVectorInstrCost' to provide vector instruction itself, as a context information for cost estimation.

2022-08-04 12:58:25 -07:00

R700Instructions.td

…

SIAnnotateControlFlow.cpp

[AMDGPU] Return better Changed status from SIAnnotateControlFlow

2022-02-17 09:38:57 +00:00

SIDefines.h

[AMDGPU] gfx11 WMMA instruction support

2022-06-30 11:13:45 -04:00

SIFixSGPRCopies.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 10:41:50 -07:00

SIFixVGPRCopies.cpp

…

SIFoldOperands.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 10:41:50 -07:00

SIFormMemoryClauses.cpp

[AMDGPU][NFC] Fix typos

2022-02-18 15:05:21 +01:00

SIFrameLowering.cpp

[AMDGPU] Fix prologue/epilogue markers in .debug_line table for trivial functions

2022-08-10 23:00:19 +05:30

SIFrameLowering.h

[AMDGPU] On gfx908, reserve VGPR for AGPR copy based on register budget.

2022-04-21 07:57:26 +05:30

SIInsertHardClauses.cpp

[AMDGPU] Update SIInsertHardClauses for GFX11

2022-06-09 21:29:56 +01:00

SIInsertWaitcnts.cpp

[AMDGPU] Omit unnecessary waitcnt before barriers

2022-07-29 11:12:36 -07:00

SIInstrFormats.td

[AMDGPU][MC][GFX11] Correct disassembly of *_e64_dpp opcodes which support op_sel

2022-07-15 13:11:59 +03:00

SIInstrInfo.cpp

Use llvm::is_contained (NFC)

2022-08-27 09:53:11 -07:00

SIInstrInfo.h

CodeGen: Remove AliasAnalysis from regalloc

2022-07-18 17:23:41 -04:00

SIInstrInfo.td

[AMDGPU][NFC] Allow separate RC for VOP3 DPP Dst

2022-08-29 11:22:07 -04:00

SIInstructions.td

[AMDGPU] Remove unused S_ADD_U64_CO_PSEUDO and S_SUB_U64_CO_PSEUDO

2022-08-24 10:28:35 +01:00

SIISelLowering.cpp

[NFCI] Move cost estimation from TargetLowering to TargetTransformInfo.

2022-08-18 00:38:55 +03:00

SIISelLowering.h

[NFCI] Move cost estimation from TargetLowering to TargetTransformInfo.

2022-08-18 00:38:55 +03:00

SILateBranchLowering.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 10:41:50 -07:00

SILoadStoreOptimizer.cpp

[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC

2022-08-08 11:24:15 -07:00

SILowerControlFlow.cpp

[AMDGPU] SILowerControlFlow uses LiveIntervals

2022-07-12 16:53:53 +01:00

SILowerI1Copies.cpp

[AMDGPU] Return better Changed status from SILowerI1Copies

2022-02-17 09:38:57 +00:00

SILowerSGPRSpills.cpp

[NFC] Fix wrong comment.

2022-07-05 13:37:44 +02:00

SIMachineFunctionInfo.cpp

[amdgpu] Implement lds kernel id intrinsic

2022-07-19 17:46:19 +01:00

SIMachineFunctionInfo.h

[amdgpu] Implement lds kernel id intrinsic

2022-07-19 17:46:19 +01:00

SIMachineScheduler.cpp

[AMDGPU] SIMachineScheduler: Add support for several MachineScheduler features

2022-07-14 09:45:31 +02:00

SIMachineScheduler.h

[AMDGPU][NFC] Fix typos

2021-11-12 11:37:21 +01:00

SIMemoryLegalizer.cpp

[llvm] Use value instead of getValue (NFC)

2022-07-13 23:11:56 -07:00

SIModeRegister.cpp

Cleanup codegen includes

2022-03-16 08:43:00 +01:00

SIOptimizeExecMasking.cpp

[NFC][AMDGPU] Some cleanups in the SIOptimizeExecMasking pass.

2022-08-23 18:16:47 +02:00

SIOptimizeExecMaskingPreRA.cpp

[AMDGPU] Improve liveness copying in si-optimize-exec-masking-pre-ra

2022-07-17 17:34:05 +09:00

SIOptimizeVGPRLiveRange.cpp

AMDGPU: Skip unexpected CFG in SIOptimizeVGPRLiveRange

2022-06-22 12:49:41 +08:00

SIPeepholeSDWA.cpp

[AMDGPU][NFC] Fix typos

2022-02-18 15:05:21 +01:00

SIPostRABundler.cpp

[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy

2022-08-19 15:38:36 -07:00

SIPreAllocateWWMRegs.cpp

AMDGPU: Defer creation of WWM VGPR spill slots

2022-04-19 21:07:13 -04:00

SIPreEmitPeephole.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 10:41:50 -07:00

SIProgramInfo.cpp

…

SIProgramInfo.h

[AMDGPU] Add remarks to output some resource usage

2022-07-15 11:01:53 -07:00

SIRegisterInfo.cpp

[RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI

2022-08-24 14:16:20 +00:00

SIRegisterInfo.h

[RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI

2022-08-24 14:16:20 +00:00

SIRegisterInfo.td

[RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI

2022-08-24 14:16:20 +00:00

SISchedule.td

[AMDGPU] gfx11 subtarget features & early tests

2022-05-11 10:31:49 -04:00

SIShrinkInstructions.cpp

[AMDGPU] GFX11 CodeGen support for MIMG instructions

2022-06-16 18:23:14 +01:00

SIWholeQuadMode.cpp

[AMDGPU] Mark GFX11 dual source blend export as strict-wqm

2022-06-20 21:58:12 +01:00

SMInstructions.td

[AMDGPU][MC][NFC] Refine SMEM store, probe and discard definitions.

2022-08-17 13:54:26 +01:00

SOPInstructions.td

[AMDGPU] New GFX11 intrinsic llvm.amdgcn.s.sendmsg.rtn

2022-06-10 08:15:23 +01:00

VIInstrFormats.td

[AMDGPU] gfx11 export instructions

2022-05-25 14:44:09 -04:00

VINTERPInstructions.td

[AMDGPU] gfx11 VINTERP intrinsics and ISel support

2022-06-17 09:16:59 -04:00

VOP1Instructions.td

[AMDGPU][NFC] Allow separate RC for VOP3 DPP Dst

2022-08-29 11:22:07 -04:00

VOP2Instructions.td

[AMDGPU] GFX11 trivial NFC tweaks

2022-07-05 17:20:17 +01:00

VOP3Instructions.td

[AMDGPU][GISel] Enable Selection of ADD3 for G_PTR_ADD

2022-08-24 14:44:19 +00:00

VOP3PInstructions.td

[AMDGPU][MC][GFX940] Correct disassembly of MFMA opcodes

2022-08-01 16:00:47 +03:00

VOPCInstructions.td

[AMDGPU][MC][GFX11] Correct src0 for VOP3_DPP variants of v_cmp*class* opcodes

2022-07-26 17:52:34 +03:00

VOPDInstructions.td

[AMDGPU] gfx11 VOPD instructions MC support

2022-06-24 11:08:39 -04:00

VOPInstructions.td

[AMDGPU] gfx11 Fix VOP3 dot instructions

2022-07-22 11:43:35 +02:00