In most cases, the type information attached to load and store instructions is meaningless and inconsistently applied. We can usually use ".b" loads and avoid the complexity of trying to assign the correct type. The one expectation is sign-extending load, which will continue to use ".s" to ensure the sign extension into a larger register is done correctly.
36 lines
1.2 KiB
LLVM
36 lines
1.2 KiB
LLVM
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %}
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define float @foo(<2 x float> %a) {
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; CHECK: .func (.param .b32 func_retval0) foo
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; CHECK: .param .align 8 .b8 foo_param_0[8]
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; CHECK: ld.param.v2.b32 {%f{{[0-9]+}}, %f{{[0-9]+}}}
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%t1 = fmul <2 x float> %a, %a
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%t2 = extractelement <2 x float> %t1, i32 0
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%t3 = extractelement <2 x float> %t1, i32 1
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%t4 = fadd float %t2, %t3
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ret float %t4
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}
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define float @bar(<4 x float> %a) {
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; CHECK: .func (.param .b32 func_retval0) bar
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; CHECK: .param .align 16 .b8 bar_param_0[16]
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; CHECK: ld.param.v4.b32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}
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%t1 = fmul <4 x float> %a, %a
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%t2 = extractelement <4 x float> %t1, i32 0
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%t3 = extractelement <4 x float> %t1, i32 1
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%t4 = fadd float %t2, %t3
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ret float %t4
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}
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define <4 x float> @baz(<4 x float> %a) {
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; CHECK: .func (.param .align 16 .b8 func_retval0[16]) baz
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; CHECK: .param .align 16 .b8 baz_param_0[16]
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; CHECK: ld.param.v4.b32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}
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; CHECK: st.param.v4.b32 [func_retval0], {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}
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%t1 = fmul <4 x float> %a, %a
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ret <4 x float> %t1
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}
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