Add a version of calculateRegisterUsage that works estimates register usage for a VPlan. This mostly just ports the existing code, with some updates to figure out what recipes will generate vectors vs scalars. There are number of changes in the computed register usages, but they should be more accurate w.r.t. to the generated vector code. There are the following changes: * Scalar usage increases in most cases by 1, as we always create a scalar canonical IV, which is alive across the loop and is not considered by the legacy implementation * Output is ordered by insertion, now scalar registers are added first due the canonical IV phi. * Using the VPlan, we now also more precisely know if an induction will be vectorized or scalarized. Depends on https://github.com/llvm/llvm-project/pull/126415 PR: https://github.com/llvm/llvm-project/pull/126437
33 lines
1.4 KiB
LLVM
33 lines
1.4 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt -passes=loop-vectorize -mtriple riscv64 -mattr=+v,+zvfbfmin -debug-only=loop-vectorize --disable-output -riscv-v-register-bit-width-lmul=1 -S < %s 2>&1 | FileCheck %s
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define void @add(ptr noalias nocapture readonly %src1, ptr noalias nocapture readonly %src2, i32 signext %size, ptr noalias nocapture writeonly %result) {
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; CHECK-LABEL: add
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; CHECK: LV(REG): Found max usage: 2 item
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; CHECK-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 3 registers
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; CHECK-NEXT: LV(REG): RegisterClass: RISCV::VRRC, 4 registers
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; CHECK-NEXT: LV(REG): Found invariant usage: 1 item
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; CHECK-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 1 registers
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entry:
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%conv = zext i32 %size to i64
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%cmp10.not = icmp eq i32 %size, 0
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br i1 %cmp10.not, label %for.cond.cleanup, label %for.body
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for.cond.cleanup:
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ret void
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for.body:
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%i.011 = phi i64 [ %add4, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds bfloat, ptr %src1, i64 %i.011
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%0 = load bfloat, ptr %arrayidx, align 4
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%arrayidx2 = getelementptr inbounds bfloat, ptr %src2, i64 %i.011
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%1 = load bfloat, ptr %arrayidx2, align 4
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%add = fadd bfloat %0, %1
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%arrayidx3 = getelementptr inbounds bfloat, ptr %result, i64 %i.011
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store bfloat %add, ptr %arrayidx3, align 4
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%add4 = add nuw nsw i64 %i.011, 1
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%exitcond.not = icmp eq i64 %add4, %conv
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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