David Green 3b4d5638b3 [AArch64] Limit vector splitting to vectors of size larger than 128bit ...

The intent of this code is to split larger vectors into smaller shuffles, but
it currently triggering on some small vector types. Limit it to vectors of size
>128bit.

2025-05-09 22:17:28 +01:00

..

32-bit.ll

…

64-bit-vector.ll

…

accelerate-vector-functions-inseltpoison.ll

[SLP]Gather scalarized calls

2025-02-04 19:09:57 -05:00

accelerate-vector-functions.ll

[SLP]Gather scalarized calls

2025-02-04 19:09:57 -05:00

alternate-vectorization-split-node.ll

Revert "[SLP]Reduce number of alternate instruction, where possible"

2025-01-31 06:37:16 -08:00

buildvector-reduce.ll

…

buildvector-vectorize.ll

…

commute.ll

…

div.ll

[AArch64][CostModel] Alter sdiv/srem cost where the divisor is constant (#123552)

2025-03-09 22:26:39 -07:00

ext-trunc.ll

…

external-non-inst-use.ll

…

external-use-icmp.ll

…

extractelements-to-shuffle.ll

[AArch64] Add a slp vectorization test for extract and shuffle costs. NFC

2025-05-06 18:09:29 +01:00

extracts-from-scalarizable-vector.ll

…

fminimumnum.ll

Vectorize: Support fminimumnum and fmaximumnum (#131781)

2025-04-15 08:08:45 +08:00

fmulladd.ll

…

fpsat.ll

…

fshl.ll

…

gather-buildvector-with-minbitwidth-user.ll

…

gather-cost.ll

[ConstantFolding] Infer getelementptr nuw flag (#119214)

2024-12-09 16:44:05 +01:00

gather-load-128.ll

…

gather-load-min-required-vf-2.ll

…

gather-reduce.ll

[InstCombine] Move gep of phi fold into separate function

2024-12-05 15:20:56 +01:00

gather-root.ll

…

gather-with-minbith-user.ll

Revert "[SLP]Reduce number of alternate instruction, where possible"

2025-01-31 06:37:16 -08:00

getelementptr2.ll

[InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144)

2024-12-05 14:36:40 +01:00

getelementptr.ll

[InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144)

2024-12-05 14:36:40 +01:00

horizontal.ll

[SLP]Represent SLP graph as a tree

2025-02-21 07:15:02 -05:00

insertelement-inseltpoison.ll

…

insertelement.ll

…

InstructionsState-is-invalid-0.ll

[SLP]Improved reduction cost/codegen

2025-02-14 11:03:33 -08:00

invalid_type.ll

…

landing_pad.ll

…

lit.local.cfg

…

load-store-q.ll

…

loadi8.ll

…

loadorder.ll

[SLP]Improve reordering of the alternate nodes

2025-04-24 14:33:10 -04:00

masked-loads-side-effects-after-vec.ll

[SLP]Cache data for compressed loads before codegen

2025-04-17 08:43:44 -07:00

matmul.ll

…

memory-runtime-checks-in-loops.ll

…

memory-runtime-checks.ll

…

minbitwidth-cast-node-length.ll

…

minimum-sizes.ll

…

mismatched-intrinsics.ll

…

mul.ll

…

multiple_reduction.ll

…

nontemporal.ll

…

phi-use-order-scalable.ll

…

PR38339.ll

…

reduce-add-i64.ll

…

reduce-fadd.ll

[SLP]Improved reduction cost/codegen

2025-02-14 11:03:33 -08:00

reduce-maximumnum-minimumnum.ll

[IVDescriptors] Support reductions with minimumnum/maximumnum. (#137335)

2025-04-28 11:16:36 +01:00

remarks.ll

[SLP]Represent SLP graph as a tree

2025-02-21 07:15:02 -05:00

reorder-fmuladd-crash.ll

[SLP]Represent SLP graph as a tree

2025-02-21 07:15:02 -05:00

reordered-loads.ll

[SLP]Use proper order when calculating costs for geps/extracts to correctly identify profitability

2025-04-09 07:43:23 -07:00

reused-scalar-repeated-in-node.ll

[SLP]Model single unique value insert + shuffle as splat + select, where profitable

2025-04-22 11:30:29 -04:00

scalable-external-user.ll

…

scalable-vector.ll

…

scalarization-overhead.ll

[SLP]Add cost estimation for gather node reshuffling

2024-12-24 15:35:29 -05:00

sdiv-pow2.ll

…

shuffle-vectors-mask-size.ll

…

slp-abs.ll

…

slp-and-reduction.ll

…

slp-fma-loss.ll

…

slp-frem.ll

…

slp-or-reduction.ll

…

slp-xor-reduction.ll

…

spillcost-di.ll

…

spillcost-order.ll

…

splat-loads.ll

…

store-ptr.ll

…

transpose-inseltpoison.ll

[SLP]Improve reordering of the alternate nodes

2025-04-24 14:33:10 -04:00

transpose.ll

[SLP]Improve reordering of the alternate nodes

2025-04-24 14:33:10 -04:00

trunc-insertion.ll

…

tsc-s116.ll

[SLP]Reduce number of alternate instruction, where possible

2025-03-12 08:18:51 -07:00

tsc-s352.ll

…

unreachable-blocks-with-phis.ll

[SLP]Fix a crash when comparing phis from unreachable blocks

2025-02-18 08:20:48 -08:00

unsigned-after-sext-node.ll

…

uselistorder.ll

…

user-node-not-in-bitwidths.ll

…

vec3-base.ll

[SLP] Make getSameOpcode support interchangeable instructions. (#135797)

2025-04-16 00:08:59 +08:00

vec3-calls.ll

…

vec3-reorder-reshuffle.ll

[SLP]Support revectorization of the previously vectorized scalars

2025-04-01 14:30:06 -04:00

vec15-base.ll

…

vecreduceadd.ll

[AArch64] Add extending reduction costs for addlv and dot

2025-02-15 20:33:03 +00:00

vector-getelementptr.ll

…

vectorizable-selects-min-max.ll

…

vectorizable-selects-uniform-cmps.ll

[AArch64] Limit vector splitting to vectors of size larger than 128bit

2025-05-09 22:17:28 +01:00

vectorize-free-extracts-inserts.ll

[SLP]Represent SLP graph as a tree

2025-02-21 07:15:02 -05:00

widen.ll

…