a28daa7c1a
We used to filter out relocations corresponding to NOP+ADR instruction pairs that were a result of linker "relaxation" optimization. However, these relocations will be useful for reversing the linker optimization. Keep the relocations and ignore them while symbolizing ADR instruction operands.
97 lines
3.4 KiB
C++
97 lines
3.4 KiB
C++
//===- bolt/Target/AArch64/AArch64MCSymbolizer.cpp ------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "AArch64MCSymbolizer.h"
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#include "bolt/Core/BinaryContext.h"
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#include "bolt/Core/BinaryFunction.h"
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#include "bolt/Core/MCPlusBuilder.h"
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#include "bolt/Core/Relocation.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/Support/Debug.h"
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#define DEBUG_TYPE "bolt-symbolizer"
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namespace llvm {
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namespace bolt {
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AArch64MCSymbolizer::~AArch64MCSymbolizer() {}
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bool AArch64MCSymbolizer::tryAddingSymbolicOperand(
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MCInst &Inst, raw_ostream &CStream, int64_t Value, uint64_t InstAddress,
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bool IsBranch, uint64_t ImmOffset, uint64_t ImmSize, uint64_t InstSize) {
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BinaryContext &BC = Function.getBinaryContext();
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MCContext *Ctx = BC.Ctx.get();
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// NOTE: the callee may incorrectly set IsBranch.
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if (BC.MIB->isBranch(Inst) || BC.MIB->isCall(Inst))
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return false;
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const uint64_t InstOffset = InstAddress - Function.getAddress();
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const Relocation *Relocation = Function.getRelocationAt(InstOffset);
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/// Add symbolic operand to the instruction with an optional addend.
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auto addOperand = [&](const MCSymbol *Symbol, uint64_t Addend,
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uint64_t RelType) {
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const MCExpr *Expr = MCSymbolRefExpr::create(Symbol, *Ctx);
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if (Addend)
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Expr = MCBinaryExpr::createAdd(Expr, MCConstantExpr::create(Addend, *Ctx),
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*Ctx);
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Inst.addOperand(MCOperand::createExpr(
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BC.MIB->getTargetExprFor(Inst, Expr, *Ctx, RelType)));
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};
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// The linker can convert ADRP+ADD and ADRP+LDR instruction sequences into
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// NOP+ADR. After the conversion, the linker might keep the relocations and
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// if we try to symbolize ADR's operand using outdated relocations, we might
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// get unexpected results. Hence, we check for the conversion/relaxation, and
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// ignore the relocation. The symbolization is done based on the PC-relative
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// value of the operand instead.
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if (Relocation && BC.MIB->isADR(Inst)) {
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if (Relocation->Type == ELF::R_AARCH64_ADD_ABS_LO12_NC ||
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Relocation->Type == ELF::R_AARCH64_LD64_GOT_LO12_NC) {
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LLVM_DEBUG(dbgs() << "BOLT-DEBUG: ignoring relocation at 0x"
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<< Twine::utohexstr(InstAddress) << '\n');
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Relocation = nullptr;
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}
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}
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if (Relocation) {
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addOperand(Relocation->Symbol, Relocation->Addend, Relocation->Type);
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return true;
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}
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if (!BC.MIB->hasPCRelOperand(Inst))
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return false;
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Value += InstAddress;
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const MCSymbol *TargetSymbol;
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uint64_t TargetOffset;
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if (!CreateNewSymbols) {
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if (BinaryData *BD = BC.getBinaryDataContainingAddress(Value)) {
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TargetSymbol = BD->getSymbol();
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TargetOffset = Value - BD->getAddress();
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} else {
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return false;
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}
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} else {
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std::tie(TargetSymbol, TargetOffset) =
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BC.handleAddressRef(Value, Function, /*IsPCRel*/ true);
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}
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addOperand(TargetSymbol, TargetOffset, 0);
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return true;
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}
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void AArch64MCSymbolizer::tryAddingPcLoadReferenceComment(raw_ostream &CStream,
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int64_t Value,
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uint64_t Address) {}
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} // namespace bolt
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} // namespace llvm
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