Nathan Chancellor 74bace2dfe

Revert "[AArch64] Improve codegen for shifted mask op" ...

This reverts commit b4e1466c35d3ca3e04244e8e8b4ffaf0784d6d37.

This causes a crash while building the Linux kernel. See the original
Phabricator review for a reduced C and LLVM IR reproducer.

2022-11-03 11:33:50 -07:00

..

AArch64

Revert "[AArch64] Improve codegen for shifted mask op"

2022-11-03 11:33:50 -07:00

AMDGPU

GlobalISel: Fix artifact combine value finder look through copy

2022-11-03 17:43:25 +01:00

ARC

[ARC] Regenerate ldst.ll

2022-10-29 14:09:58 +01:00

ARM

[ARM] Fix vector ule zero lowering

2022-11-02 22:34:05 +00:00

AVR

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BPF

[llvm-objdump] Add --no-print-imm-hex to tests depending on it.

2022-10-29 15:40:26 -07:00

CSKY

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DirectX

[DirectX backend] set target triple to "dxil-ms-dx"

2022-10-24 14:49:31 -07:00

Generic

[lit][REQUIRES] Fix some tests with incorrect REQUIRES clauses

2022-11-01 13:49:23 -07:00

Hexagon

[lit][REQUIRES] Fix some tests with incorrect REQUIRES clauses

2022-11-01 13:49:23 -07:00

Inputs

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Lanai

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LoongArch

[LoongArch] Fix codegen for [su]itofp instructions

2022-11-03 11:40:50 +08:00

M68k

[NFC][m68k] Add pipeline.ll

2022-10-31 08:52:46 +08:00

Mips

[llvm-objdump] Add --no-print-imm-hex to tests depending on it.

2022-10-29 15:40:26 -07:00

MIR

[MIRVRegNamer] Avoid opcode hash collision

2022-11-02 13:53:12 +00:00

MLRegalloc

[mlgo] More wildcarding in extra features logging for regalloc

2022-10-25 08:20:55 -07:00

MSP430

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NVPTX

[CUDA, NVPTX] Added basic __bf16 support for NVPTX.

2022-10-25 11:08:06 -07:00

PowerPC

[PowerPC] Add new DMR register classes to Future CPU.

2022-11-03 08:29:55 -05:00

RISCV

Revert "[RISCV] Enable the LocalStackSlotAllocation pass support"

2022-11-01 20:04:07 -07:00

SPARC

SPARC: Register null target streamer

2022-11-02 16:05:34 -07:00

SPIRV

[SPIRV] support the enqueue_kernel builtin function

2022-11-01 02:52:08 +03:00

SystemZ

SystemZ: Register null target streamer

2022-11-01 11:11:22 -07:00

Thumb

[llvm-objdump] Add --no-print-imm-hex to tests depending on it.

2022-10-29 15:40:26 -07:00

Thumb2

[ARM] Fix vector ule zero lowering

2022-11-02 22:34:05 +00:00

VE

[VE] Change the way to lower selectcc

2022-10-20 08:08:59 +09:00

WebAssembly

[wasm-ld] Update supported features in the generic CPU configuration

2022-11-02 12:51:28 -07:00

WinCFGuard

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WinEH

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X86

[X86] combineConcatVectorOps - fold 512-bit concat(GF2P8AFFINEQB(x,y,c),GF2P8AFFINEQB(z,w,c)) -> GF2P8AFFINEQB(concat(x,z),concat(y,w),c)

2022-11-01 12:06:46 +00:00

XCore

XCore: Register null MCTargetStreamer

2022-11-01 11:11:03 -07:00