b4df4695f7
Closes #172937 https://docs.nvidia.com/cuda/cuda-compiler-driver-nvcc/#virtual-architecture-macros > The architecture list macro `__CUDA_ARCH_LIST__` is a list of comma-separated `__CUDA_ARCH__` values for each of the virtual architectures specified in the compiler invocation. The list is sorted in numerically ascending order. Note that unlike NVCC which defines the macro for all C/C++/CUDA compilations done with nvcc, clang defines the macro *only* for CUDA compilations.
261 lines
6.6 KiB
C++
261 lines
6.6 KiB
C++
#include "clang/Basic/Cuda.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/VersionTuple.h"
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namespace clang {
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struct CudaVersionMapEntry {
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const char *Name;
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CudaVersion Version;
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llvm::VersionTuple TVersion;
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};
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#define CUDA_ENTRY(major, minor) \
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{ \
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#major "." #minor, CudaVersion::CUDA_##major##minor, \
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llvm::VersionTuple(major, minor) \
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}
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static const CudaVersionMapEntry CudaNameVersionMap[] = {
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CUDA_ENTRY(7, 0),
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CUDA_ENTRY(7, 5),
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CUDA_ENTRY(8, 0),
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CUDA_ENTRY(9, 0),
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CUDA_ENTRY(9, 1),
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CUDA_ENTRY(9, 2),
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CUDA_ENTRY(10, 0),
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CUDA_ENTRY(10, 1),
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CUDA_ENTRY(10, 2),
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CUDA_ENTRY(11, 0),
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CUDA_ENTRY(11, 1),
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CUDA_ENTRY(11, 2),
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CUDA_ENTRY(11, 3),
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CUDA_ENTRY(11, 4),
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CUDA_ENTRY(11, 5),
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CUDA_ENTRY(11, 6),
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CUDA_ENTRY(11, 7),
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CUDA_ENTRY(11, 8),
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CUDA_ENTRY(12, 0),
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CUDA_ENTRY(12, 1),
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CUDA_ENTRY(12, 2),
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CUDA_ENTRY(12, 3),
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CUDA_ENTRY(12, 4),
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CUDA_ENTRY(12, 5),
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CUDA_ENTRY(12, 6),
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CUDA_ENTRY(12, 8),
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CUDA_ENTRY(12, 9),
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CUDA_ENTRY(13, 0),
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{"", CudaVersion::NEW, llvm::VersionTuple(std::numeric_limits<int>::max())},
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{"unknown", CudaVersion::UNKNOWN, {}} // End of list tombstone.
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};
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#undef CUDA_ENTRY
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const char *CudaVersionToString(CudaVersion V) {
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for (auto *I = CudaNameVersionMap; I->Version != CudaVersion::UNKNOWN; ++I)
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if (I->Version == V)
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return I->Name;
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return CudaVersionToString(CudaVersion::UNKNOWN);
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}
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CudaVersion CudaStringToVersion(const llvm::Twine &S) {
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std::string VS = S.str();
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for (auto *I = CudaNameVersionMap; I->Version != CudaVersion::UNKNOWN; ++I)
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if (I->Name == VS)
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return I->Version;
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return CudaVersion::UNKNOWN;
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}
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CudaVersion ToCudaVersion(llvm::VersionTuple Version) {
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for (auto *I = CudaNameVersionMap; I->Version != CudaVersion::UNKNOWN; ++I)
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if (I->TVersion == Version)
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return I->Version;
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return CudaVersion::UNKNOWN;
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}
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CudaVersion MinVersionForOffloadArch(OffloadArch A) {
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if (A == OffloadArch::UNKNOWN)
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return CudaVersion::UNKNOWN;
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// AMD GPUs do not depend on CUDA versions.
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if (IsAMDOffloadArch(A))
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return CudaVersion::CUDA_70;
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switch (A) {
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case OffloadArch::SM_20:
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case OffloadArch::SM_21:
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case OffloadArch::SM_30:
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case OffloadArch::SM_32_:
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case OffloadArch::SM_35:
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case OffloadArch::SM_37:
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case OffloadArch::SM_50:
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case OffloadArch::SM_52:
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case OffloadArch::SM_53:
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return CudaVersion::CUDA_70;
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case OffloadArch::SM_60:
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case OffloadArch::SM_61:
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case OffloadArch::SM_62:
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return CudaVersion::CUDA_80;
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case OffloadArch::SM_70:
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return CudaVersion::CUDA_90;
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case OffloadArch::SM_72:
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return CudaVersion::CUDA_91;
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case OffloadArch::SM_75:
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return CudaVersion::CUDA_100;
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case OffloadArch::SM_80:
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return CudaVersion::CUDA_110;
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case OffloadArch::SM_86:
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return CudaVersion::CUDA_111;
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case OffloadArch::SM_87:
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return CudaVersion::CUDA_114;
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case OffloadArch::SM_89:
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case OffloadArch::SM_90:
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return CudaVersion::CUDA_118;
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case OffloadArch::SM_90a:
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return CudaVersion::CUDA_120;
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case OffloadArch::SM_100:
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case OffloadArch::SM_100a:
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case OffloadArch::SM_101:
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case OffloadArch::SM_101a:
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case OffloadArch::SM_120:
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case OffloadArch::SM_120a:
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return CudaVersion::CUDA_128;
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case OffloadArch::SM_103:
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case OffloadArch::SM_103a:
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case OffloadArch::SM_121:
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case OffloadArch::SM_121a:
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return CudaVersion::CUDA_129;
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case OffloadArch::SM_88:
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case OffloadArch::SM_110:
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case OffloadArch::SM_110a:
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return CudaVersion::CUDA_130;
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default:
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llvm_unreachable("invalid enum");
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}
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}
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CudaVersion MaxVersionForOffloadArch(OffloadArch A) {
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// AMD GPUs do not depend on CUDA versions.
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if (IsAMDOffloadArch(A))
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return CudaVersion::NEW;
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switch (A) {
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case OffloadArch::UNKNOWN:
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return CudaVersion::UNKNOWN;
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case OffloadArch::SM_20:
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case OffloadArch::SM_21:
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return CudaVersion::CUDA_80;
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case OffloadArch::SM_30:
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case OffloadArch::SM_32_:
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return CudaVersion::CUDA_102;
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case OffloadArch::SM_35:
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case OffloadArch::SM_37:
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return CudaVersion::CUDA_118;
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case OffloadArch::SM_101:
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case OffloadArch::SM_101a:
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return CudaVersion::CUDA_129;
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default:
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return CudaVersion::NEW;
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}
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}
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bool CudaFeatureEnabled(llvm::VersionTuple Version, CudaFeature Feature) {
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return CudaFeatureEnabled(ToCudaVersion(Version), Feature);
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}
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bool CudaFeatureEnabled(CudaVersion Version, CudaFeature Feature) {
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switch (Feature) {
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case CudaFeature::CUDA_USES_NEW_LAUNCH:
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return Version >= CudaVersion::CUDA_92;
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case CudaFeature::CUDA_USES_FATBIN_REGISTER_END:
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return Version >= CudaVersion::CUDA_101;
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}
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llvm_unreachable("Unknown CUDA feature.");
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}
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unsigned CudaArchToID(OffloadArch Arch) {
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switch (Arch) {
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case OffloadArch::SM_20:
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return 200;
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case OffloadArch::SM_21:
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return 210;
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case OffloadArch::SM_30:
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return 300;
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case OffloadArch::SM_32_:
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return 320;
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case OffloadArch::SM_35:
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return 350;
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case OffloadArch::SM_37:
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return 370;
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case OffloadArch::SM_50:
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return 500;
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case OffloadArch::SM_52:
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return 520;
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case OffloadArch::SM_53:
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return 530;
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case OffloadArch::SM_60:
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return 600;
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case OffloadArch::SM_61:
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return 610;
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case OffloadArch::SM_62:
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return 620;
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case OffloadArch::SM_70:
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return 700;
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case OffloadArch::SM_72:
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return 720;
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case OffloadArch::SM_75:
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return 750;
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case OffloadArch::SM_80:
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return 800;
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case OffloadArch::SM_86:
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return 860;
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case OffloadArch::SM_87:
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return 870;
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case OffloadArch::SM_88:
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return 880;
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case OffloadArch::SM_89:
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return 890;
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case OffloadArch::SM_90:
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case OffloadArch::SM_90a:
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return 900;
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case OffloadArch::SM_100:
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case OffloadArch::SM_100a:
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return 1000;
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case OffloadArch::SM_101:
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case OffloadArch::SM_101a:
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return 1010;
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case OffloadArch::SM_103:
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case OffloadArch::SM_103a:
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return 1030;
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case OffloadArch::SM_110:
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case OffloadArch::SM_110a:
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return 1100;
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case OffloadArch::SM_120:
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case OffloadArch::SM_120a:
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return 1200;
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case OffloadArch::SM_121:
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case OffloadArch::SM_121a:
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return 1210;
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default:
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break;
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}
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llvm_unreachable("invalid NVIDIA GPU architecture");
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}
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bool IsNVIDIAAcceleratedOffloadArch(OffloadArch Arch) {
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switch (Arch) {
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case OffloadArch::SM_90a:
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case OffloadArch::SM_100a:
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case OffloadArch::SM_101a:
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case OffloadArch::SM_103a:
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case OffloadArch::SM_110a:
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case OffloadArch::SM_120a:
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case OffloadArch::SM_121a:
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return true;
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default:
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return false;
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}
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}
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} // namespace clang
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