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llvm-project/llvm/test/CodeGen/AArch64/ldexp.ll
Shubham Sandeep Rastogi 44b94a4f75
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953) 
This patch adds the target hooks required by Instruction Referencing for
the AArch64 target, as mentioned in
https://llvm.org/docs/InstrRefDebugInfo.html#target-hooks

Which allows the Instruction Referenced LiveDebugValues Pass to track
spills and restore instructions.

With this patch we can use the
`llvm/utils/llvm-locstats/llvm-locstats.py` to see the coverage
statistics on a clang.dSYM built with in RelWithDebInfo we can see:

coverage with dbg_value:
```
=================================================
            Debug Location Statistics       
 =================================================
     cov%           samples         percentage(~)  
 -------------------------------------------------
   0%              5828021               38%
   (0%,10%)         127739                0%
   [10%,20%)        143344                0%
   [20%,30%)        172100                1%
   [30%,40%)        193173                1%
   [40%,50%)        127366                0%
   [50%,60%)        308350                2%
   [60%,70%)        257055                1%
   [70%,80%)        212410                1%
   [80%,90%)        295316                1%
   [90%,100%)       349280                2%
   100%            7313157               47%
 =================================================
 -the number of debug variables processed: 15327311
 -PC ranges covered: 67%
 -------------------------------------------------
 -total availability: 62%
 =================================================
 ```
 
coverage with InstrRef without target hooks fix:
```
 =================================================
            Debug Location Statistics       
 =================================================
     cov%           samples         percentage(~)  
 -------------------------------------------------
   0%              6052807               39%
   (0%,10%)         127710                0%
   [10%,20%)        129999                0%
   [20%,30%)        155011                1%
   [30%,40%)        171206                1%
   [40%,50%)        102861                0%
   [50%,60%)        264734                1%
   [60%,70%)        212386                1%
   [70%,80%)        176872                1%
   [80%,90%)        242120                1%
   [90%,100%)       254465                1%
   100%            7437215               48%
 =================================================
 -the number of debug variables processed: 15327386
 -PC ranges covered: 67%
 -------------------------------------------------
 -total availability: 60%
 =================================================
 ```
 
coverage with InstrRef with target hooks fix:
```
 =================================================
            Debug Location Statistics       
 =================================================
     cov%           samples         percentage(~)  
 -------------------------------------------------
   0%              5972267               39%
   (0%,10%)         118873                0%
   [10%,20%)        127138                0%
   [20%,30%)        153181                1%
   [30%,40%)        170102                1%
   [40%,50%)        102180                0%
   [50%,60%)        263672                1%
   [60%,70%)        212865                1%
   [70%,80%)        176633                1%
   [80%,90%)        242403                1%
   [90%,100%)       264441                1%
   100%            7494527               48%
 =================================================
 -the number of debug variables processed: 15298282
 -PC ranges covered: 71%
 -------------------------------------------------
 -total availability: 61%
 =================================================
 ```
 
 I believe this should be a good indication that Instruction Referencing should be turned on for AArch64?
2025-11-14 10:36:47 -08:00

267 lines
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LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; RUN: llc -mtriple=aarch64 -mattr=+sve < %s -o - | FileCheck -check-prefixes=SVE,SVELINUX %s
; RUN: llc -mtriple=aarch64 -global-isel < %s -o - | FileCheck -check-prefixes=GISEL %s
; RUN: llc -mtriple=aarch64-windows-msvc -mattr=+sve < %s -o - | FileCheck -check-prefixes=SVE,SVEWINDOWS %s
; RUN: llc -mtriple=aarch64-windows-msvc < %s -o - | FileCheck -check-prefixes=WINDOWS %s
define double @testExp(double %val, i32 %a) {
; SVE-LABEL: testExp:
; SVE: // %bb.0: // %entry
; SVE-NEXT: // kill: def $w0 killed $w0 def $x0
; SVE-NEXT: sxtw x8, w0
; SVE-NEXT: ptrue p0.d
; SVE-NEXT: // kill: def $d0 killed $d0 def $z0
; SVE-NEXT: fmov d1, x8
; SVE-NEXT: fscale z0.d, p0/m, z0.d, z1.d
; SVE-NEXT: // kill: def $d0 killed $d0 killed $z0
; SVE-NEXT: ret
;
; GISEL-LABEL: testExp:
; GISEL: // %bb.0: // %entry
; GISEL-NEXT: b ldexp
;
; WINDOWS-LABEL: testExp:
; WINDOWS: // %bb.0: // %entry
; WINDOWS-NEXT: b ldexp
entry:
%call = tail call fast double @ldexp(double %val, i32 %a)
ret double %call
}
declare double @ldexp(double, i32) memory(none)
define double @testExpIntrinsic(double %val, i32 %a) {
; SVE-LABEL: testExpIntrinsic:
; SVE: // %bb.0: // %entry
; SVE-NEXT: // kill: def $w0 killed $w0 def $x0
; SVE-NEXT: sxtw x8, w0
; SVE-NEXT: ptrue p0.d
; SVE-NEXT: // kill: def $d0 killed $d0 def $z0
; SVE-NEXT: fmov d1, x8
; SVE-NEXT: fscale z0.d, p0/m, z0.d, z1.d
; SVE-NEXT: // kill: def $d0 killed $d0 killed $z0
; SVE-NEXT: ret
;
; GISEL-LABEL: testExpIntrinsic:
; GISEL: // %bb.0: // %entry
; GISEL-NEXT: b ldexp
;
; WINDOWS-LABEL: testExpIntrinsic:
; WINDOWS: // %bb.0: // %entry
; WINDOWS-NEXT: b ldexp
entry:
%call = tail call fast double @llvm.ldexp.f64(double %val, i32 %a)
ret double %call
}
define float @testExpf(float %val, i32 %a) {
; SVELINUX-LABEL: testExpf:
; SVELINUX: // %bb.0: // %entry
; SVELINUX-NEXT: fmov s1, w0
; SVELINUX-NEXT: ptrue p0.s
; SVELINUX-NEXT: // kill: def $s0 killed $s0 def $z0
; SVELINUX-NEXT: fscale z0.s, p0/m, z0.s, z1.s
; SVELINUX-NEXT: // kill: def $s0 killed $s0 killed $z0
; SVELINUX-NEXT: ret
;
; GISEL-LABEL: testExpf:
; GISEL: // %bb.0: // %entry
; GISEL-NEXT: b ldexpf
;
; SVEWINDOWS-LABEL: testExpf:
; SVEWINDOWS: // %bb.0: // %entry
; SVEWINDOWS-NEXT: b ldexpf
;
; WINDOWS-LABEL: testExpf:
; WINDOWS: // %bb.0: // %entry
; WINDOWS-NEXT: b ldexpf
entry:
%call = tail call fast float @ldexpf(float %val, i32 %a)
ret float %call
}
define float @testExpfIntrinsic(float %val, i32 %a) {
; SVE-LABEL: testExpfIntrinsic:
; SVE: // %bb.0: // %entry
; SVE-NEXT: fmov s1, w0
; SVE-NEXT: ptrue p0.s
; SVE-NEXT: // kill: def $s0 killed $s0 def $z0
; SVE-NEXT: fscale z0.s, p0/m, z0.s, z1.s
; SVE-NEXT: // kill: def $s0 killed $s0 killed $z0
; SVE-NEXT: ret
;
; GISEL-LABEL: testExpfIntrinsic:
; GISEL: // %bb.0: // %entry
; GISEL-NEXT: b ldexpf
;
; WINDOWS-LABEL: testExpfIntrinsic:
; WINDOWS: .seh_proc testExpfIntrinsic
; WINDOWS-NEXT: // %bb.0: // %entry
; WINDOWS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; WINDOWS-NEXT: .seh_save_reg_x x30, 16
; WINDOWS-NEXT: .seh_endprologue
; WINDOWS-NEXT: fcvt d0, s0
; WINDOWS-NEXT: bl ldexp
; WINDOWS-NEXT: fcvt s0, d0
; WINDOWS-NEXT: .seh_startepilogue
; WINDOWS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; WINDOWS-NEXT: .seh_save_reg_x x30, 16
; WINDOWS-NEXT: .seh_endepilogue
; WINDOWS-NEXT: ret
; WINDOWS-NEXT: .seh_endfunclet
; WINDOWS-NEXT: .seh_endproc
entry:
%call = tail call fast float @llvm.ldexp.f32(float %val, i32 %a)
ret float %call
}
define <2 x float> @test_ldexp_v2f32_v2i32(<2 x float> %Val, <2 x i32> %Exp) {
; SVE-LABEL: test_ldexp_v2f32_v2i32:
; SVE: // %bb.0:
; SVE-NEXT: // kill: def $d1 killed $d1 def $z1
; SVE-NEXT: mov w8, v1.s[1]
; SVE-NEXT: // kill: def $d0 killed $d0 def $z0
; SVE-NEXT: mov s2, v0.s[1]
; SVE-NEXT: ptrue p0.s
; SVE-NEXT: fscale z0.s, p0/m, z0.s, z1.s
; SVE-NEXT: fmov s3, w8
; SVE-NEXT: fscale z2.s, p0/m, z2.s, z3.s
; SVE-NEXT: mov v0.s[1], v2.s[0]
; SVE-NEXT: // kill: def $d0 killed $d0 killed $z0
; SVE-NEXT: ret
;
; GISEL-LABEL: test_ldexp_v2f32_v2i32:
; GISEL: // %bb.0:
; GISEL-NEXT: sub sp, sp, #48
; GISEL-NEXT: stp d9, d8, [sp, #16] // 16-byte Folded Spill
; GISEL-NEXT: str x30, [sp, #32] // 8-byte Spill
; GISEL-NEXT: .cfi_def_cfa_offset 48
; GISEL-NEXT: .cfi_offset w30, -16
; GISEL-NEXT: .cfi_offset b8, -24
; GISEL-NEXT: .cfi_offset b9, -32
; GISEL-NEXT: // kill: def $d1 killed $d1 def $q1
; GISEL-NEXT: fmov w0, s1
; GISEL-NEXT: // kill: def $d0 killed $d0 def $q0
; GISEL-NEXT: mov s8, v0.s[1]
; GISEL-NEXT: mov s9, v1.s[1]
; GISEL-NEXT: // kill: def $s0 killed $s0 killed $q0
; GISEL-NEXT: bl ldexpf
; GISEL-NEXT: // kill: def $s0 killed $s0 def $q0
; GISEL-NEXT: str q0, [sp] // 16-byte Spill
; GISEL-NEXT: fmov w0, s9
; GISEL-NEXT: fmov s0, s8
; GISEL-NEXT: bl ldexpf
; GISEL-NEXT: ldr q1, [sp] // 16-byte Reload
; GISEL-NEXT: // kill: def $s0 killed $s0 def $q0
; GISEL-NEXT: ldp d9, d8, [sp, #16] // 16-byte Folded Reload
; GISEL-NEXT: ldr x30, [sp, #32] // 8-byte Reload
; GISEL-NEXT: mov v1.s[1], v0.s[0]
; GISEL-NEXT: fmov d0, d1
; GISEL-NEXT: add sp, sp, #48
; GISEL-NEXT: ret
;
; WINDOWS-LABEL: test_ldexp_v2f32_v2i32:
; WINDOWS: .seh_proc test_ldexp_v2f32_v2i32
; WINDOWS-NEXT: // %bb.0:
; WINDOWS-NEXT: sub sp, sp, #48
; WINDOWS-NEXT: .seh_stackalloc 48
; WINDOWS-NEXT: str x30, [sp, #32] // 8-byte Spill
; WINDOWS-NEXT: .seh_save_reg x30, 32
; WINDOWS-NEXT: .seh_endprologue
; WINDOWS-NEXT: // kill: def $d0 killed $d0 def $q0
; WINDOWS-NEXT: mov s2, v0.s[1]
; WINDOWS-NEXT: // kill: def $d1 killed $d1 def $q1
; WINDOWS-NEXT: stp q1, q0, [sp] // 32-byte Folded Spill
; WINDOWS-NEXT: mov w0, v1.s[1]
; WINDOWS-NEXT: fcvt d0, s2
; WINDOWS-NEXT: bl ldexp
; WINDOWS-NEXT: ldr q1, [sp, #16] // 16-byte Reload
; WINDOWS-NEXT: fcvt s0, d0
; WINDOWS-NEXT: fcvt d1, s1
; WINDOWS-NEXT: str q0, [sp, #16] // 16-byte Spill
; WINDOWS-NEXT: ldr q0, [sp] // 16-byte Reload
; WINDOWS-NEXT: fmov w0, s0
; WINDOWS-NEXT: fmov d0, d1
; WINDOWS-NEXT: bl ldexp
; WINDOWS-NEXT: fcvt s0, d0
; WINDOWS-NEXT: ldr q1, [sp, #16] // 16-byte Reload
; WINDOWS-NEXT: mov v0.s[1], v1.s[0]
; WINDOWS-NEXT: // kill: def $d0 killed $d0 killed $q0
; WINDOWS-NEXT: .seh_startepilogue
; WINDOWS-NEXT: ldr x30, [sp, #32] // 8-byte Reload
; WINDOWS-NEXT: .seh_save_reg x30, 32
; WINDOWS-NEXT: add sp, sp, #48
; WINDOWS-NEXT: .seh_stackalloc 48
; WINDOWS-NEXT: .seh_endepilogue
; WINDOWS-NEXT: ret
; WINDOWS-NEXT: .seh_endfunclet
; WINDOWS-NEXT: .seh_endproc
%result = call <2 x float> @llvm.ldexp.v2f32.v2i32(<2 x float> %Val, <2 x i32> %Exp)
ret <2 x float> %result
}
declare float @ldexpf(float, i32) memory(none)
define fp128 @testExpl(fp128 %val, i32 %a) {
; SVE-LABEL: testExpl:
; SVE: // %bb.0: // %entry
; SVE-NEXT: b ldexpl
;
; GISEL-LABEL: testExpl:
; GISEL: // %bb.0: // %entry
; GISEL-NEXT: b ldexpl
;
; WINDOWS-LABEL: testExpl:
; WINDOWS: // %bb.0: // %entry
; WINDOWS-NEXT: b ldexpl
entry:
%call = tail call fast fp128 @ldexpl(fp128 %val, i32 %a)
ret fp128 %call
}
declare fp128 @ldexpl(fp128, i32) memory(none)
define half @testExpf16(half %val, i32 %a) {
; SVE-LABEL: testExpf16:
; SVE: // %bb.0: // %entry
; SVE-NEXT: fcvt s0, h0
; SVE-NEXT: fmov s1, w0
; SVE-NEXT: ptrue p0.s
; SVE-NEXT: fscale z0.s, p0/m, z0.s, z1.s
; SVE-NEXT: fcvt h0, s0
; SVE-NEXT: ret
;
; GISEL-LABEL: testExpf16:
; GISEL: // %bb.0: // %entry
; GISEL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; GISEL-NEXT: .cfi_def_cfa_offset 16
; GISEL-NEXT: .cfi_offset w30, -16
; GISEL-NEXT: fcvt s0, h0
; GISEL-NEXT: bl ldexpf
; GISEL-NEXT: fcvt h0, s0
; GISEL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; GISEL-NEXT: ret
;
; WINDOWS-LABEL: testExpf16:
; WINDOWS: .seh_proc testExpf16
; WINDOWS-NEXT: // %bb.0: // %entry
; WINDOWS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; WINDOWS-NEXT: .seh_save_reg_x x30, 16
; WINDOWS-NEXT: .seh_endprologue
; WINDOWS-NEXT: fcvt d0, h0
; WINDOWS-NEXT: bl ldexp
; WINDOWS-NEXT: fcvt h0, d0
; WINDOWS-NEXT: .seh_startepilogue
; WINDOWS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; WINDOWS-NEXT: .seh_save_reg_x x30, 16
; WINDOWS-NEXT: .seh_endepilogue
; WINDOWS-NEXT: ret
; WINDOWS-NEXT: .seh_endfunclet
; WINDOWS-NEXT: .seh_endproc
entry:
%0 = tail call fast half @llvm.ldexp.f16.i32(half %val, i32 %a)
ret half %0
}
declare half @llvm.ldexp.f16.i32(half, i32) memory(none)
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