ff1efe9e73
Specifically, this patch adds the following combines: SUB x, (CSET LO, (CMP a, b)) -> SBC x, 0, (CMP a, b) SUB (SUB x, y), (CSET LO, (CMP a, b)) -> SBC x, y, (CMP a, b) The CSET may be preceded by a ZEXT. Fixes #164748.
393 lines
12 KiB
LLVM
393 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s | FileCheck --check-prefixes=CHECK,CHECK-SD %s
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; RUN: llc < %s -global-isel | FileCheck --check-prefixes=CHECK,CHECK-GI %s
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target triple = "aarch64-none-linux-gnu"
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define i32 @test_basic_i32(i32 %a, i32 %b, i32 %x, i32 %y) {
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; CHECK-SD-LABEL: test_basic_i32:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: cmp w0, w1
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; CHECK-SD-NEXT: sbc w0, w2, w3
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_basic_i32:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: cmp w0, w1
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; CHECK-GI-NEXT: sub w9, w2, w3
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; CHECK-GI-NEXT: cset w8, lo
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; CHECK-GI-NEXT: sub w0, w9, w8
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; CHECK-GI-NEXT: ret
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%cc = icmp ult i32 %a, %b
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%carry = zext i1 %cc to i32
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%sub = sub i32 %x, %y
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%res = sub i32 %sub, %carry
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ret i32 %res
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}
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define i64 @test_basic_i64(i64 %a, i64 %b, i64 %x, i64 %y) {
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; CHECK-SD-LABEL: test_basic_i64:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: cmp x0, x1
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; CHECK-SD-NEXT: sbc x0, x2, x3
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_basic_i64:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: cmp x0, x1
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; CHECK-GI-NEXT: sub x9, x2, x3
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; CHECK-GI-NEXT: cset w8, lo
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; CHECK-GI-NEXT: sub x0, x9, x8
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; CHECK-GI-NEXT: ret
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%cc = icmp ult i64 %a, %b
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%carry = zext i1 %cc to i64
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%sub = sub i64 %x, %y
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%res = sub i64 %sub, %carry
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ret i64 %res
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}
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define i64 @test_mixed_i32_i64(i32 %a, i32 %b, i64 %x, i64 %y) {
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; CHECK-SD-LABEL: test_mixed_i32_i64:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: cmp w0, w1
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; CHECK-SD-NEXT: sbc x0, x2, x3
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_mixed_i32_i64:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: cmp w0, w1
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; CHECK-GI-NEXT: sub x9, x2, x3
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; CHECK-GI-NEXT: cset w8, lo
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; CHECK-GI-NEXT: sub x0, x9, x8
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; CHECK-GI-NEXT: ret
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%cc = icmp ult i32 %a, %b
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%carry = zext i1 %cc to i64
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%sub = sub i64 %x, %y
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%res = sub i64 %sub, %carry
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ret i64 %res
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}
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define i32 @test_mixed_i64_i32(i64 %a, i64 %b, i32 %x, i32 %y) {
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; CHECK-SD-LABEL: test_mixed_i64_i32:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: cmp x0, x1
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; CHECK-SD-NEXT: sbc w0, w2, w3
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_mixed_i64_i32:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: cmp x0, x1
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; CHECK-GI-NEXT: sub w9, w2, w3
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; CHECK-GI-NEXT: cset w8, lo
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; CHECK-GI-NEXT: sub w0, w9, w8
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; CHECK-GI-NEXT: ret
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%cc = icmp ult i64 %a, %b
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%carry = zext i1 %cc to i32
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%sub = sub i32 %x, %y
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%res = sub i32 %sub, %carry
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ret i32 %res
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}
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define i32 @test_only_borrow(i32 %a, i32 %b, i32 %x) {
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; CHECK-SD-LABEL: test_only_borrow:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: cmp w0, w1
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; CHECK-SD-NEXT: sbc w0, w2, wzr
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_only_borrow:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: cmp w0, w1
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; CHECK-GI-NEXT: cset w8, lo
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; CHECK-GI-NEXT: sub w0, w2, w8
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; CHECK-GI-NEXT: ret
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%cc = icmp ult i32 %a, %b
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%carry = zext i1 %cc to i32
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%res = sub i32 %x, %carry
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ret i32 %res
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}
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define i32 @test_sext_add(i32 %a, i32 %b, i32 %x, i32 %y) {
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; CHECK-SD-LABEL: test_sext_add:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: cmp w0, w1
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; CHECK-SD-NEXT: sbc w0, w2, w3
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_sext_add:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: cmp w0, w1
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; CHECK-GI-NEXT: sub w9, w2, w3
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; CHECK-GI-NEXT: cset w8, lo
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; CHECK-GI-NEXT: sbfx w8, w8, #0, #1
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; CHECK-GI-NEXT: add w0, w9, w8
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; CHECK-GI-NEXT: ret
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%cc = icmp ult i32 %a, %b
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%carry = sext i1 %cc to i32
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%sub = sub i32 %x, %y
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%res = add i32 %sub, %carry
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ret i32 %res
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}
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; FIXME: This case could be supported with reversed operands to the CMP.
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define i32 @test_ugt(i32 %a, i32 %b, i32 %x, i32 %y) {
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; CHECK-SD-LABEL: test_ugt:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: cmp w0, w1
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; CHECK-SD-NEXT: sub w8, w2, w3
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; CHECK-SD-NEXT: cset w9, hi
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; CHECK-SD-NEXT: sub w0, w8, w9
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_ugt:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: cmp w0, w1
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; CHECK-GI-NEXT: sub w9, w2, w3
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; CHECK-GI-NEXT: cset w8, hi
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; CHECK-GI-NEXT: sub w0, w9, w8
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; CHECK-GI-NEXT: ret
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%cc = icmp ugt i32 %a, %b
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%carry = zext i1 %cc to i32
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%sub = sub i32 %x, %y
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%res = sub i32 %sub, %carry
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ret i32 %res
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}
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define i32 @test_unsupported_cc_slt(i32 %a, i32 %b, i32 %x, i32 %y) {
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; CHECK-SD-LABEL: test_unsupported_cc_slt:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: cmp w0, w1
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; CHECK-SD-NEXT: sub w8, w2, w3
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; CHECK-SD-NEXT: cset w9, lt
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; CHECK-SD-NEXT: sub w0, w8, w9
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_unsupported_cc_slt:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: cmp w0, w1
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; CHECK-GI-NEXT: sub w9, w2, w3
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; CHECK-GI-NEXT: cset w8, lt
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; CHECK-GI-NEXT: sub w0, w9, w8
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; CHECK-GI-NEXT: ret
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%cc = icmp slt i32 %a, %b
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%carry = zext i1 %cc to i32
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%sub = sub i32 %x, %y
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%res = sub i32 %sub, %carry
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ret i32 %res
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}
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define i32 @test_unsupported_cc_sgt(i32 %a, i32 %b, i32 %x, i32 %y) {
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; CHECK-SD-LABEL: test_unsupported_cc_sgt:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: cmp w0, w1
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; CHECK-SD-NEXT: sub w8, w2, w3
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; CHECK-SD-NEXT: cset w9, gt
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; CHECK-SD-NEXT: sub w0, w8, w9
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_unsupported_cc_sgt:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: cmp w0, w1
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; CHECK-GI-NEXT: sub w9, w2, w3
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; CHECK-GI-NEXT: cset w8, gt
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; CHECK-GI-NEXT: sub w0, w9, w8
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; CHECK-GI-NEXT: ret
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%cc = icmp sgt i32 %a, %b
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%carry = zext i1 %cc to i32
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%sub = sub i32 %x, %y
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%res = sub i32 %sub, %carry
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ret i32 %res
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}
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define i32 @test_multiple_setcc_uses(i32 %a, i32 %b, i32 %x) {
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; CHECK-SD-LABEL: test_multiple_setcc_uses:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
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; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
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; CHECK-SD-NEXT: .cfi_offset w19, -8
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; CHECK-SD-NEXT: .cfi_offset w30, -16
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; CHECK-SD-NEXT: cmp w0, w1
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; CHECK-SD-NEXT: cset w0, lo
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; CHECK-SD-NEXT: sub w19, w2, w0
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; CHECK-SD-NEXT: bl use
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; CHECK-SD-NEXT: mov w0, w19
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; CHECK-SD-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_multiple_setcc_uses:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
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; CHECK-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
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; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
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; CHECK-GI-NEXT: .cfi_offset w19, -8
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; CHECK-GI-NEXT: .cfi_offset w20, -16
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; CHECK-GI-NEXT: .cfi_offset w30, -32
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; CHECK-GI-NEXT: cmp w0, w1
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; CHECK-GI-NEXT: mov w19, w2
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; CHECK-GI-NEXT: cset w20, lo
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; CHECK-GI-NEXT: mov w0, w20
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; CHECK-GI-NEXT: bl use
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; CHECK-GI-NEXT: sub w0, w19, w20
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; CHECK-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
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; CHECK-GI-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
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; CHECK-GI-NEXT: ret
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%cc = icmp ult i32 %a, %b
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%carry = zext i1 %cc to i32
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%res = sub i32 %x, %carry
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tail call void @use(i1 %cc)
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ret i32 %res
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}
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define i32 @test_multiple_carry_uses(i32 %a, i32 %b, i32 %x) {
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; CHECK-SD-LABEL: test_multiple_carry_uses:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
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; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
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; CHECK-SD-NEXT: .cfi_offset w19, -8
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; CHECK-SD-NEXT: .cfi_offset w30, -16
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; CHECK-SD-NEXT: cmp w0, w1
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; CHECK-SD-NEXT: cset w0, lo
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; CHECK-SD-NEXT: sub w19, w2, w0
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; CHECK-SD-NEXT: bl use
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; CHECK-SD-NEXT: mov w0, w19
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; CHECK-SD-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_multiple_carry_uses:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
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; CHECK-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
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; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
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; CHECK-GI-NEXT: .cfi_offset w19, -8
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; CHECK-GI-NEXT: .cfi_offset w20, -16
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; CHECK-GI-NEXT: .cfi_offset w30, -32
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; CHECK-GI-NEXT: cmp w0, w1
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; CHECK-GI-NEXT: mov w19, w2
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; CHECK-GI-NEXT: cset w20, lo
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; CHECK-GI-NEXT: mov w0, w20
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; CHECK-GI-NEXT: bl use
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; CHECK-GI-NEXT: sub w0, w19, w20
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; CHECK-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
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; CHECK-GI-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
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; CHECK-GI-NEXT: ret
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%cc = icmp ult i32 %a, %b
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%carry = zext i1 %cc to i32
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%res = sub i32 %x, %carry
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tail call void @use(i32 %carry)
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ret i32 %res
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}
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define i32 @test_multiple_sub_uses(i32 %a, i32 %b, i32 %x, i32 %y) {
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; CHECK-SD-LABEL: test_multiple_sub_uses:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
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; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
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; CHECK-SD-NEXT: .cfi_offset w19, -8
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; CHECK-SD-NEXT: .cfi_offset w30, -16
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; CHECK-SD-NEXT: sub w8, w2, w3
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; CHECK-SD-NEXT: cmp w0, w1
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; CHECK-SD-NEXT: mov w0, w8
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; CHECK-SD-NEXT: sbc w19, w2, w3
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; CHECK-SD-NEXT: bl use
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; CHECK-SD-NEXT: mov w0, w19
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; CHECK-SD-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_multiple_sub_uses:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
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; CHECK-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
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; CHECK-GI-NEXT: .cfi_def_cfa_offset 32
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; CHECK-GI-NEXT: .cfi_offset w19, -8
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; CHECK-GI-NEXT: .cfi_offset w20, -16
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; CHECK-GI-NEXT: .cfi_offset w30, -32
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; CHECK-GI-NEXT: sub w19, w2, w3
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; CHECK-GI-NEXT: cmp w0, w1
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; CHECK-GI-NEXT: mov w0, w19
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; CHECK-GI-NEXT: cset w20, lo
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; CHECK-GI-NEXT: bl use
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; CHECK-GI-NEXT: sub w0, w19, w20
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; CHECK-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
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; CHECK-GI-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
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; CHECK-GI-NEXT: ret
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%cc = icmp ult i32 %a, %b
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%carry = zext i1 %cc to i32
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%sub = sub i32 %x, %y
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%res = sub i32 %sub, %carry
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tail call void @use(i32 %sub)
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ret i32 %res
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}
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define i8 @test_i8(i8 %a, i8 %b, i8 %x, i8 %y) {
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; CHECK-SD-LABEL: test_i8:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: and w8, w0, #0xff
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; CHECK-SD-NEXT: cmp w8, w1, uxtb
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; CHECK-SD-NEXT: sbc w0, w2, w3
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_i8:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: and w8, w0, #0xff
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; CHECK-GI-NEXT: sub w9, w2, w3
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; CHECK-GI-NEXT: cmp w8, w1, uxtb
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; CHECK-GI-NEXT: cset w8, lo
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; CHECK-GI-NEXT: sub w0, w9, w8
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; CHECK-GI-NEXT: ret
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%cc = icmp ult i8 %a, %b
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%carry = zext i1 %cc to i8
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%sub = sub i8 %x, %y
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%res = sub i8 %sub, %carry
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ret i8 %res
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}
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define i16 @test_i16(i16 %a, i16 %b, i16 %x, i16 %y) {
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; CHECK-SD-LABEL: test_i16:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: and w8, w0, #0xffff
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; CHECK-SD-NEXT: cmp w8, w1, uxth
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; CHECK-SD-NEXT: sbc w0, w2, w3
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_i16:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: and w8, w0, #0xffff
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; CHECK-GI-NEXT: sub w9, w2, w3
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; CHECK-GI-NEXT: cmp w8, w1, uxth
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; CHECK-GI-NEXT: cset w8, lo
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; CHECK-GI-NEXT: sub w0, w9, w8
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; CHECK-GI-NEXT: ret
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%cc = icmp ult i16 %a, %b
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%carry = zext i1 %cc to i16
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%sub = sub i16 %x, %y
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%res = sub i16 %sub, %carry
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ret i16 %res
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}
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define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %x, <4 x i32> %y) {
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; CHECK-SD-LABEL: test_v4i32:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: sub v2.4s, v2.4s, v3.4s
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; CHECK-SD-NEXT: cmhi v0.4s, v1.4s, v0.4s
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; CHECK-SD-NEXT: add v0.4s, v2.4s, v0.4s
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_v4i32:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: movi v4.4s, #1
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; CHECK-GI-NEXT: cmhi v0.4s, v1.4s, v0.4s
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; CHECK-GI-NEXT: sub v1.4s, v2.4s, v3.4s
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; CHECK-GI-NEXT: and v0.16b, v0.16b, v4.16b
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; CHECK-GI-NEXT: sub v0.4s, v1.4s, v0.4s
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|
; CHECK-GI-NEXT: ret
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%cc = icmp ult <4 x i32> %a, %b
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%carry = zext <4 x i1> %cc to <4 x i32>
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%sub = sub <4 x i32> %x, %y
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%res = sub <4 x i32> %sub, %carry
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ret <4 x i32> %res
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}
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|
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declare void @use()
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|
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; CHECK: {{.*}}
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