fee40fef5c
This commit introduces the ROCDL Dialect (i.e. the ROCDL ops + the code to lower those ROCDL ops to LLWM intrinsics/functions). Think of ROCDL Dialect as analogous to the NVVM Dialect, but for AMD GPUs. This patch contains just the essentials needed to get a simple example up and running. We expect to make further additions to the ROCDL Dialect. This is the first of 3 commits, the follow-up will be: * add a pass that lowers GPU Dialect to ROCDL Dialect * add a "mlir-rocm-runner" utility Closes tensorflow/mlir#146 COPYBARA_INTEGRATE_REVIEW=https://github.com/tensorflow/mlir/pull/146 from deven-amd:deven-rocdl-dialect e78e8005c75a78912631116c78dc844fcc4b0de9 PiperOrigin-RevId: 271511259
83 lines
2.9 KiB
C++
83 lines
2.9 KiB
C++
//===- ROCDLDialect.cpp - ROCDL IR Ops and Dialect registration -----------===//
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//
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// Copyright 2019 The MLIR Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// =============================================================================
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//
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// This file defines the types and operation details for the ROCDL IR dialect in
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// MLIR, and the LLVM IR dialect. It also registers the dialect.
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//
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// The ROCDL dialect only contains GPU specific additions on top of the general
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// LLVM dialect.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/LLVMIR/ROCDLDialect.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/MLIRContext.h"
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#include "mlir/IR/Operation.h"
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#include "mlir/IR/StandardTypes.h"
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#include "llvm/AsmParser/Parser.h"
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Support/SourceMgr.h"
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namespace mlir {
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namespace ROCDL {
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//===----------------------------------------------------------------------===//
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// Printing/parsing for ROCDL ops
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//===----------------------------------------------------------------------===//
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static void printROCDLOp(OpAsmPrinter &p, Operation *op) {
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p << op->getName() << " ";
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p.printOperands(op->getOperands());
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if (op->getNumResults() > 0)
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interleaveComma(op->getResultTypes(), p << " : ");
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}
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// <operation> ::= `rocdl.XYZ` : type
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static ParseResult parseROCDLOp(OpAsmParser &parser, OperationState &result) {
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Type type;
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return failure(parser.parseOptionalAttributeDict(result.attributes) ||
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parser.parseColonType(type) ||
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parser.addTypeToList(type, result.types));
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}
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//===----------------------------------------------------------------------===//
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// ROCDLDialect initialization, type parsing, and registration.
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//===----------------------------------------------------------------------===//
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// TODO(herhut): This should be the llvm.rocdl dialect once this is supported.
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ROCDLDialect::ROCDLDialect(MLIRContext *context) : Dialect("rocdl", context) {
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addOperations<
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#define GET_OP_LIST
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#include "mlir/Dialect/LLVMIR/ROCDLOps.cpp.inc"
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>();
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// Support unknown operations because not all ROCDL operations are registered.
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allowUnknownOperations();
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}
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#define GET_OP_CLASSES
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#include "mlir/Dialect/LLVMIR/ROCDLOps.cpp.inc"
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static DialectRegistration<ROCDLDialect> rocdlDialect;
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} // namespace ROCDL
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} // namespace mlir
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