83451d8d4d
Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2091 This patch adds support for AMDGPU-specific function attributes for HIP kernels Added setTargetAttributes for AMDGPUTargetCIRGenInfo to set kernel attributes Added generic string attribute handler in amendFunction to translate string-values with "cir." prefix function attributes to LLVM function attributes Follows OGCG AMDGPU implementation from "clang/lib/CodeGen/Targets/AMDGPU.cpp".
140 lines
3.9 KiB
C++
140 lines
3.9 KiB
C++
#include "TargetInfo.h"
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#include "ABIInfo.h"
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#include "CIRGenFunction.h"
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#include "CIRGenModule.h"
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#include "mlir/Dialect/Ptr/IR/MemorySpaceInterfaces.h"
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#include "clang/CIR/Dialect/IR/CIRAttrs.h"
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#include "clang/CIR/Dialect/IR/CIRDialect.h"
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using namespace clang;
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using namespace clang::CIRGen;
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bool clang::CIRGen::isEmptyRecordForLayout(const ASTContext &context,
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QualType t) {
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const auto *rd = t->getAsRecordDecl();
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if (!rd)
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return false;
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// If this is a C++ record, check the bases first.
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if (const CXXRecordDecl *cxxrd = dyn_cast<CXXRecordDecl>(rd)) {
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if (cxxrd->isDynamicClass())
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return false;
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for (const auto &i : cxxrd->bases())
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if (!isEmptyRecordForLayout(context, i.getType()))
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return false;
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}
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for (const auto *i : rd->fields())
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if (!isEmptyFieldForLayout(context, i))
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return false;
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return true;
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}
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bool clang::CIRGen::isEmptyFieldForLayout(const ASTContext &context,
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const FieldDecl *fd) {
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if (fd->isZeroLengthBitField())
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return true;
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if (fd->isUnnamedBitField())
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return false;
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return isEmptyRecordForLayout(context, fd->getType());
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}
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namespace {
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class AMDGPUABIInfo : public ABIInfo {
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public:
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AMDGPUABIInfo(CIRGenTypes &cgt) : ABIInfo(cgt) {}
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};
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class AMDGPUTargetCIRGenInfo : public TargetCIRGenInfo {
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public:
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AMDGPUTargetCIRGenInfo(CIRGenTypes &cgt)
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: TargetCIRGenInfo(std::make_unique<AMDGPUABIInfo>(cgt)) {}
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void setTargetAttributes(const clang::Decl *decl, mlir::Operation *global,
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CIRGenModule &cgm) const override {
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if (auto func = mlir::dyn_cast<cir::FuncOp>(global)) {
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if (requiresAMDGPUProtectedVisibility(decl, func.getGlobalVisibility())) {
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func.setGlobalVisibility(cir::VisibilityKind::Protected);
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func.setDSOLocal(true);
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}
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setAMDGPUTargetFunctionAttributes(decl, func, cgm);
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} else if (auto gv = mlir::dyn_cast<cir::GlobalOp>(global)) {
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if (requiresAMDGPUProtectedVisibility(decl, gv.getGlobalVisibility())) {
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gv.setGlobalVisibility(cir::VisibilityKind::Protected);
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gv.setDSOLocal(true);
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}
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}
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}
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};
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} // namespace
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namespace {
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class X8664ABIInfo : public ABIInfo {
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public:
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X8664ABIInfo(CIRGenTypes &cgt) : ABIInfo(cgt) {}
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};
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class X8664TargetCIRGenInfo : public TargetCIRGenInfo {
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public:
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X8664TargetCIRGenInfo(CIRGenTypes &cgt)
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: TargetCIRGenInfo(std::make_unique<X8664ABIInfo>(cgt)) {}
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};
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} // namespace
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namespace {
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class NVPTXABIInfo : public ABIInfo {
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public:
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NVPTXABIInfo(CIRGenTypes &cgt) : ABIInfo(cgt) {}
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};
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class NVPTXTargetCIRGenInfo : public TargetCIRGenInfo {
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public:
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NVPTXTargetCIRGenInfo(CIRGenTypes &cgt)
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: TargetCIRGenInfo(std::make_unique<NVPTXABIInfo>(cgt)) {}
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};
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} // namespace
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std::unique_ptr<TargetCIRGenInfo>
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clang::CIRGen::createAMDGPUTargetCIRGenInfo(CIRGenTypes &cgt) {
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return std::make_unique<AMDGPUTargetCIRGenInfo>(cgt);
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}
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std::unique_ptr<TargetCIRGenInfo>
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clang::CIRGen::createNVPTXTargetCIRGenInfo(CIRGenTypes &cgt) {
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return std::make_unique<NVPTXTargetCIRGenInfo>(cgt);
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}
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std::unique_ptr<TargetCIRGenInfo>
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clang::CIRGen::createX8664TargetCIRGenInfo(CIRGenTypes &cgt) {
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return std::make_unique<X8664TargetCIRGenInfo>(cgt);
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}
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ABIInfo::~ABIInfo() noexcept = default;
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bool TargetCIRGenInfo::isNoProtoCallVariadic(
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const FunctionNoProtoType *fnType) const {
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// The following conventions are known to require this to be false:
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// x86_stdcall
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// MIPS
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// For everything else, we just prefer false unless we opt out.
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return false;
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}
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clang::LangAS
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TargetCIRGenInfo::getGlobalVarAddressSpace(CIRGenModule &cgm,
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const clang::VarDecl *d) const {
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assert(!cgm.getLangOpts().OpenCL &&
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!(cgm.getLangOpts().CUDA && cgm.getLangOpts().CUDAIsDevice) &&
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"Address space agnostic languages only");
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return d ? d->getType().getAddressSpace() : LangAS::Default;
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}
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