83451d8d4d
Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2091 This patch adds support for AMDGPU-specific function attributes for HIP kernels Added setTargetAttributes for AMDGPUTargetCIRGenInfo to set kernel attributes Added generic string attribute handler in amendFunction to translate string-values with "cir." prefix function attributes to LLVM function attributes Follows OGCG AMDGPU implementation from "clang/lib/CodeGen/Targets/AMDGPU.cpp".
256 lines
9.8 KiB
C++
256 lines
9.8 KiB
C++
//===---- AMDGPU.cpp - AMDGPU-specific CIR CodeGen ------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This provides AMDGPU-specific CIR CodeGen logic for function attributes.
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//
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//===----------------------------------------------------------------------===//
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#include "../CIRGenModule.h"
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#include "../TargetInfo.h"
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#include "clang/AST/Attr.h"
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#include "clang/AST/Decl.h"
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#include "clang/Basic/TargetInfo.h"
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#include "clang/CIR/Dialect/IR/CIRDialect.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace clang;
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using namespace clang::CIRGen;
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bool clang::CIRGen::requiresAMDGPUProtectedVisibility(
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const Decl *d, cir::VisibilityKind visibility) {
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if (visibility != cir::VisibilityKind::Hidden)
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return false;
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return !d->hasAttr<OMPDeclareTargetDeclAttr>() &&
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(d->hasAttr<DeviceKernelAttr>() ||
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(isa<FunctionDecl>(d) && d->hasAttr<CUDAGlobalAttr>()) ||
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(isa<VarDecl>(d) &&
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(d->hasAttr<CUDADeviceAttr>() || d->hasAttr<CUDAConstantAttr>() ||
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cast<VarDecl>(d)->getType()->isCUDADeviceBuiltinSurfaceType() ||
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cast<VarDecl>(d)->getType()->isCUDADeviceBuiltinTextureType())));
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}
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namespace {
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/// Handle amdgpu-flat-work-group-size attribute.
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static void
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handleAMDGPUFlatWorkGroupSizeAttr(const FunctionDecl *fd, cir::FuncOp func,
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CIRGenModule &cgm, CIRGenBuilderTy &builder,
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bool isOpenCLKernel, bool isHIPKernel) {
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const auto *flatWGS = fd->getAttr<AMDGPUFlatWorkGroupSizeAttr>();
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const auto *reqdWGS =
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cgm.getLangOpts().OpenCL ? fd->getAttr<ReqdWorkGroupSizeAttr>() : nullptr;
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if (flatWGS || reqdWGS) {
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unsigned min = 0, max = 0;
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if (flatWGS) {
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min = flatWGS->getMin()
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->EvaluateKnownConstInt(cgm.getASTContext())
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.getExtValue();
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max = flatWGS->getMax()
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->EvaluateKnownConstInt(cgm.getASTContext())
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.getExtValue();
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}
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if (reqdWGS && min == 0 && max == 0) {
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min = max = reqdWGS->getXDim()
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->EvaluateKnownConstInt(cgm.getASTContext())
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.getExtValue() *
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reqdWGS->getYDim()
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->EvaluateKnownConstInt(cgm.getASTContext())
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.getExtValue() *
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reqdWGS->getZDim()
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->EvaluateKnownConstInt(cgm.getASTContext())
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.getExtValue();
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}
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if (min != 0) {
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assert(min <= max && "Min must be less than or equal Max");
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std::string attrVal = llvm::utostr(min) + "," + llvm::utostr(max);
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func->setAttr("cir.amdgpu-flat-work-group-size",
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builder.getStringAttr(attrVal));
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} else {
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assert(max == 0 && "Max must be zero");
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}
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} else if (isOpenCLKernel || isHIPKernel) {
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// By default, restrict the maximum size to a value specified by
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// --gpu-max-threads-per-block=n or its default value for HIP.
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const unsigned openCLDefaultMaxWorkGroupSize = 256;
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const unsigned defaultMaxWorkGroupSize =
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isOpenCLKernel ? openCLDefaultMaxWorkGroupSize
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: cgm.getLangOpts().GPUMaxThreadsPerBlock;
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std::string attrVal =
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std::string("1,") + llvm::utostr(defaultMaxWorkGroupSize);
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func->setAttr("cir.amdgpu-flat-work-group-size",
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builder.getStringAttr(attrVal));
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}
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}
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/// Handle amdgpu-waves-per-eu attribute.
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static void handleAMDGPUWavesPerEUAttr(const FunctionDecl *fd, cir::FuncOp func,
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CIRGenModule &cgm,
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CIRGenBuilderTy &builder) {
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const auto *attr = fd->getAttr<AMDGPUWavesPerEUAttr>();
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if (!attr)
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return;
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unsigned min =
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attr->getMin()->EvaluateKnownConstInt(cgm.getASTContext()).getExtValue();
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unsigned max = attr->getMax()
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? attr->getMax()
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->EvaluateKnownConstInt(cgm.getASTContext())
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.getExtValue()
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: 0;
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if (min != 0) {
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assert((max == 0 || min <= max) && "Min must be less than or equal Max");
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std::string attrVal = llvm::utostr(min);
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if (max != 0)
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attrVal = attrVal + "," + llvm::utostr(max);
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func->setAttr("cir.amdgpu-waves-per-eu", builder.getStringAttr(attrVal));
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} else {
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assert(max == 0 && "Max must be zero");
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}
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}
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/// Handle amdgpu-num-sgpr attribute.
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static void handleAMDGPUNumSGPRAttr(const FunctionDecl *fd, cir::FuncOp func,
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CIRGenModule &cgm,
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CIRGenBuilderTy &builder) {
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const auto *attr = fd->getAttr<AMDGPUNumSGPRAttr>();
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if (!attr)
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return;
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uint32_t numSGPR = attr->getNumSGPR();
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if (numSGPR != 0) {
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func->setAttr("cir.amdgpu-num-sgpr",
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builder.getStringAttr(llvm::utostr(numSGPR)));
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}
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}
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/// Handle amdgpu-num-vgpr attribute.
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static void handleAMDGPUNumVGPRAttr(const FunctionDecl *fd, cir::FuncOp func,
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CIRGenModule &cgm,
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CIRGenBuilderTy &builder) {
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const auto *attr = fd->getAttr<AMDGPUNumVGPRAttr>();
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if (!attr)
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return;
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uint32_t numVGPR = attr->getNumVGPR();
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if (numVGPR != 0) {
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func->setAttr("cir.amdgpu-num-vgpr",
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builder.getStringAttr(llvm::utostr(numVGPR)));
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}
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}
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/// Handle amdgpu-max-num-workgroups attribute.
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static void handleAMDGPUMaxNumWorkGroupsAttr(const FunctionDecl *fd,
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cir::FuncOp func,
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CIRGenModule &cgm,
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CIRGenBuilderTy &builder) {
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const auto *attr = fd->getAttr<AMDGPUMaxNumWorkGroupsAttr>();
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if (!attr)
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return;
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uint32_t x = attr->getMaxNumWorkGroupsX()
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->EvaluateKnownConstInt(cgm.getASTContext())
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.getExtValue();
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uint32_t y = attr->getMaxNumWorkGroupsY()
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? attr->getMaxNumWorkGroupsY()
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->EvaluateKnownConstInt(cgm.getASTContext())
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.getExtValue()
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: 1;
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uint32_t z = attr->getMaxNumWorkGroupsZ()
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? attr->getMaxNumWorkGroupsZ()
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->EvaluateKnownConstInt(cgm.getASTContext())
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.getExtValue()
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: 1;
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llvm::SmallString<32> attrVal;
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llvm::raw_svector_ostream os(attrVal);
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os << x << ',' << y << ',' << z;
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func->setAttr("cir.amdgpu-max-num-workgroups",
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builder.getStringAttr(attrVal.str()));
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}
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/// Handle amdgpu-cluster-dims attribute.
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static void handleAMDGPUClusterDimsAttr(const FunctionDecl *fd,
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cir::FuncOp func, CIRGenModule &cgm,
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CIRGenBuilderTy &builder,
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bool isOpenCLKernel) {
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if (const auto *attr = fd->getAttr<CUDAClusterDimsAttr>()) {
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auto getExprVal = [&](const Expr *e) {
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return e ? e->EvaluateKnownConstInt(cgm.getASTContext()).getExtValue()
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: 1;
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};
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unsigned x = getExprVal(attr->getX());
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unsigned y = getExprVal(attr->getY());
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unsigned z = getExprVal(attr->getZ());
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llvm::SmallString<32> attrVal;
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llvm::raw_svector_ostream os(attrVal);
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os << x << ',' << y << ',' << z;
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func->setAttr("cir.amdgpu-cluster-dims",
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builder.getStringAttr(attrVal.str()));
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}
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const TargetInfo &targetInfo = cgm.getASTContext().getTargetInfo();
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if ((isOpenCLKernel &&
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targetInfo.hasFeatureEnabled(targetInfo.getTargetOpts().FeatureMap,
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"clusters")) ||
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fd->hasAttr<CUDANoClusterAttr>()) {
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func->setAttr("cir.amdgpu-cluster-dims", builder.getStringAttr("0,0,0"));
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}
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}
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/// Handle amdgpu-ieee attribute.
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static void handleAMDGPUIEEEAttr(cir::FuncOp func, CIRGenModule &cgm,
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CIRGenBuilderTy &builder) {
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if (!cgm.getCodeGenOpts().EmitIEEENaNCompliantInsts)
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func->setAttr("cir.amdgpu-ieee", builder.getStringAttr("false"));
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}
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/// Handle amdgpu-expand-waitcnt-profiling attribute.
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static void handleAMDGPUExpandWaitcntProfilingAttr(cir::FuncOp func,
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CIRGenModule &cgm,
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CIRGenBuilderTy &builder) {
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if (cgm.getCodeGenOpts().AMDGPUExpandWaitcntProfiling)
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func->setAttr("cir.amdgpu-expand-waitcnt-profiling",
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builder.getStringAttr(""));
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}
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} // namespace
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void clang::CIRGen::setAMDGPUTargetFunctionAttributes(const Decl *decl,
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cir::FuncOp func,
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CIRGenModule &cgm) {
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if (func.isDeclaration())
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return;
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CIRGenBuilderTy &builder = cgm.getBuilder();
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const auto *fd = dyn_cast_or_null<FunctionDecl>(decl);
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if (fd) {
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const bool isOpenCLKernel =
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cgm.getLangOpts().OpenCL && fd->hasAttr<DeviceKernelAttr>();
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const bool isHIPKernel =
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cgm.getLangOpts().HIP && fd->hasAttr<CUDAGlobalAttr>();
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// TODO(CIR): Set amdgpu_kernel calling convention for HIP kernels.
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handleAMDGPUFlatWorkGroupSizeAttr(fd, func, cgm, builder, isOpenCLKernel,
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isHIPKernel);
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handleAMDGPUWavesPerEUAttr(fd, func, cgm, builder);
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handleAMDGPUNumSGPRAttr(fd, func, cgm, builder);
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handleAMDGPUNumVGPRAttr(fd, func, cgm, builder);
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handleAMDGPUMaxNumWorkGroupsAttr(fd, func, cgm, builder);
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handleAMDGPUClusterDimsAttr(fd, func, cgm, builder, isOpenCLKernel);
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}
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handleAMDGPUIEEEAttr(func, cgm, builder);
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handleAMDGPUExpandWaitcntProfilingAttr(func, cgm, builder);
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}
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