51b925df94
This change adds a transformation and pass to the NvGPU dialect that attempts to optimize reads/writes from a memref representing GPU shared memory in order to avoid bank conflicts. Given a value representing a shared memory memref, it traverses all reads/writes within the parent op and, subject to suitable conditions, rewrites all last dimension index values such that element locations in the final (col) dimension are given by `newColIdx = col % vecSize + perm[row](col/vecSize,row)` where `perm` is a permutation function indexed by `row` and `vecSize` is the vector access size in elements (currently assumes 128bit vectorized accesses, but this can be made a parameter). This specific transformation can help optimize typical distributed & vectorized accesses common to loading matrix multiplication operands to/from shared memory. Differential Revision: https://reviews.llvm.org/D127457
34 lines
900 B
C++
34 lines
900 B
C++
//===- PassDetail.h - NVGPU Pass class details -----------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef DIALECT_NVGPU_TRANSFORMS_PASSDETAIL_H_
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#define DIALECT_NVGPU_TRANSFORMS_PASSDETAIL_H_
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#include "mlir/IR/BuiltinOps.h"
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#include "mlir/IR/Dialect.h"
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#include "mlir/Pass/Pass.h"
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namespace mlir {
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namespace arith {
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class ArithmeticDialect;
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} // namespace arith
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namespace memref {
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class MemRefDialect;
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} // namespace memref
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namespace vector {
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class VectorDialect;
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} // namespace vector
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#define GEN_PASS_CLASSES
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#include "mlir/Dialect/NVGPU/Passes.h.inc"
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} // namespace mlir
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#endif // DIALECT_NVGPU_TRANSFORMS_PASSDETAIL_H_
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