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llvm-project/llvm/lib/Target/AArch64
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Sander de Smalen 8cb5663abd [AArch64][SVE] Guard bitcast patterns under IsLE predicate 
Reviewed By: efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79352
2020-05-05 13:18:35 +01:00
..
AsmParser
[AArch64] Armv8.6-A Mat Mul SVE Assembly
2020-04-24 15:54:06 +01:00
Disassembler
CMake: Make most target symbols hidden by default
2020-01-14 19:46:52 -08:00
MCTargetDesc
[MC][NFC] Use camelCase style for functions in MCObjectStreamer
2020-04-20 20:09:20 -07:00
TargetInfo
CMake: Make most target symbols hidden by default
2020-01-14 19:46:52 -08:00
Utils
[AArch64][SVE] Add patterns for unpredicated load/store to frame-indices.
2020-01-22 14:32:27 +00:00
AArch64.h
[AArch64][SVE] Add a pass for SVE intrinsic optimisations
2020-04-14 10:41:49 +01:00
AArch64.td
[AArch64] Add NVIDIA Carmel support
2020-05-04 13:52:30 +01:00
AArch64A53Fix835769.cpp
…
AArch64A57FPLoadBalancing.cpp
…
AArch64AdvSIMDScalarPass.cpp
…
AArch64AsmPrinter.cpp
[XRay] Change ARM/AArch64/powerpc64le to use version 2 sled (PC-relative address)
2020-04-24 08:35:43 -07:00
AArch64BranchTargets.cpp
[AArch64] Fix BTI landing pad generation.
2020-02-13 10:44:34 +00:00
AArch64CallingConvention.cpp
…
AArch64CallingConvention.h
Add Windows Control Flow Guard checks (/guard:cf).
2019-10-28 15:19:39 +00:00
AArch64CallingConvention.td
[AArch64][SVE] Remove nxv1f32 and nxv1f64 as legal types
2019-12-12 09:49:22 +00:00
AArch64CallLowering.cpp
[AArch64][GlobalISel] Fix sub-64b stack parameter passing on Darwin.
2020-04-24 13:56:43 -07:00
AArch64CallLowering.h
…
AArch64CleanupLocalDynamicTLSPass.cpp
[CallSiteInfo] Handle bundles when updating call site info
2020-02-27 13:57:06 +01:00
AArch64CollectLOH.cpp
[AArch64CollectLOH] Debug insts should not break LOH collection [14/14]
2020-04-22 17:03:41 -07:00
AArch64Combine.td
[AArch64][GlobalISel] Change G_FCONSTANTs feeding into stores into G_CONSTANTS
2020-01-16 15:18:44 -08:00
AArch64CompressJumpTables.cpp
[Alignment][NFC] Deprecate Align::None()
2020-01-24 12:53:58 +01:00
AArch64CondBrTuning.cpp
[AArch64CondBrTuning] Ignore debug insts when scanning for NZCV clobbers [10/14]
2020-04-22 17:03:40 -07:00
AArch64ConditionalCompares.cpp
[AArch64ConditionalCompares] Ignore debug insts in findConvertibleCompare [8/14]
2020-04-22 17:03:40 -07:00
AArch64ConditionOptimizer.cpp
AArch64: Remove reversedInstructionsWithoutDebug helper
2020-04-24 11:28:17 -07:00
AArch64DeadRegisterDefinitionsPass.cpp
…
AArch64ExpandImm.cpp
…
AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
CodeGen: Use Register in TargetFrameLowering
2020-04-07 17:07:44 -04:00
AArch64FalkorHWPFFix.cpp
[TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true
2020-01-19 14:20:37 -08:00
AArch64FastISel.cpp
[Alignment][NFC] Transitionning more getMachineMemOperand call sites
2020-03-31 11:04:10 +00:00
AArch64FrameLowering.cpp
CodeGen: Use Register in TargetFrameLowering
2020-04-07 17:07:44 -04:00
AArch64FrameLowering.h
CodeGen: Use Register in TargetFrameLowering
2020-04-07 17:07:44 -04:00
AArch64GenRegisterBankInfo.def
…
AArch64InstrAtomics.td
DAG: Use TargetConstant for FENCE operands
2020-01-02 17:16:10 -05:00
AArch64InstrFormats.td
[TableGen] Drop deprecated leading # operation (NOP) and replace ## with #
2020-04-25 16:26:45 -07:00
AArch64InstrInfo.cpp
AArch64: Remove reversedInstructionsWithoutDebug helper
2020-04-24 11:28:17 -07:00
AArch64InstrInfo.h
[AArch64CondBrTuning] Ignore debug insts when scanning for NZCV clobbers [10/14]
2020-04-22 17:03:40 -07:00
AArch64InstrInfo.td
[AArch64] Allow PAC mnemonics in the HINT space with PAC disabled
2020-04-24 16:56:51 +01:00
AArch64InstructionSelector.cpp
Fix buildbot after 9f31446c
2020-04-28 15:19:17 -07:00
AArch64ISelDAGToDAG.cpp
[SVE][Codegen] Lower legal min & max operations
2020-05-04 11:19:19 +01:00
AArch64ISelLowering.cpp
[SVE][Codegen] Lower legal min & max operations
2020-05-04 11:19:19 +01:00
AArch64ISelLowering.h
[SVE][Codegen] Lower legal min & max operations
2020-05-04 11:19:19 +01:00
AArch64LegalizerInfo.cpp
[AArch64][GlobalISel] Set the current debug loc when missing in some cases.
2020-04-23 01:34:57 -07:00
AArch64LegalizerInfo.h
GlobalISel: Add observer argument to legalizeIntrinsic
2020-01-29 18:33:45 -05:00
AArch64LoadStoreOptimizer.cpp
[llvm][CodeGen] Check for memory instructions when querying for alias status
2020-04-24 22:54:46 +02:00
AArch64MachineFunctionInfo.cpp
MachineFunctionInfo for AArch64 in MIR
2020-04-17 15:16:59 -07:00
AArch64MachineFunctionInfo.h
[MachineOutliner] Annotation for outlined functions in AArch64
2020-04-20 13:33:31 -07:00
AArch64MacroFusion.cpp
…
AArch64MacroFusion.h
…
AArch64MCInstLower.cpp
…
AArch64MCInstLower.h
…
AArch64PBQPRegAlloc.cpp
…
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
…
AArch64PfmCounters.td
…
AArch64PreLegalizerCombiner.cpp
[AArch64PreLegalizerCombiner] Fix debug invariance issue in matchFConstantToConstant [13/14]
2020-04-22 17:03:41 -07:00
AArch64PromoteConstant.cpp
[IR] Replace all uses of CallBase::getCalledValue() with getCalledOperand().
2020-04-27 22:17:03 -07:00
AArch64RedundantCopyElimination.cpp
…
AArch64RegisterBankInfo.cpp
[AArch64][FIX] FPR16_lo for f16 indexed patterns.
2020-04-23 23:44:56 +01:00
AArch64RegisterBankInfo.h
GlobalISel: Add type argument to getRegBankFromRegClass
2020-01-03 16:25:10 -05:00
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
[AArch64][FIX] FPR16_lo for f16 indexed patterns.
2020-04-23 23:44:56 +01:00
AArch64RegisterInfo.h
CodeGen: More conversions to use Register
2020-04-07 18:54:36 -04:00
AArch64RegisterInfo.td
[AArch64][FIX] FPR16_lo for f16 indexed patterns.
2020-04-23 23:44:56 +01:00
AArch64SchedA53.td
…
AArch64SchedA57.td
[AArch64] Add BIT/BIF support.
2020-02-14 14:19:39 +00:00
AArch64SchedA57WriteRes.td
…
AArch64SchedCyclone.td
[AArch64] Add BIT/BIF support.
2020-02-14 14:19:39 +00:00
AArch64SchedExynosM3.td
[AArch64] Add BIT/BIF support.
2020-02-14 14:19:39 +00:00
AArch64SchedExynosM4.td
[AArch64] Add BIT/BIF support.
2020-02-14 14:19:39 +00:00
AArch64SchedExynosM5.td
[AArch64] Add BIT/BIF support.
2020-02-14 14:19:39 +00:00
AArch64SchedFalkor.td
…
AArch64SchedFalkorDetails.td
[AArch64] Add BIT/BIF support.
2020-02-14 14:19:39 +00:00
AArch64SchedKryo.td
…
AArch64SchedKryoDetails.td
[AArch64] Add BIT/BIF support.
2020-02-14 14:19:39 +00:00
AArch64SchedPredExynos.td
[AArch64] Add new scheduling predicates
2019-11-11 15:02:51 -06:00
AArch64SchedPredicates.td
[NFC] [AArch64] Fix wrong documentation for IsStoreRegOffsetOp
2019-11-23 19:11:31 +01:00
AArch64SchedThunderX2T99.td
[AArch64] Add BIT/BIF support.
2020-02-14 14:19:39 +00:00
AArch64SchedThunderX.td
…
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
[Alignment][NFC] Transitionning more getMachineMemOperand call sites
2020-03-31 11:04:10 +00:00
AArch64SelectionDAGInfo.h
…
AArch64SIMDInstrOpt.cpp
Make llvm::StringRef to std::string conversions explicit.
2020-01-28 23:25:25 +01:00
AArch64SpeculationHardening.cpp
…
AArch64StackOffset.h
Explicitly include <cassert> when using assert
2020-03-02 22:45:28 +01:00
AArch64StackTagging.cpp
[memtag] Plug in stack safety analysis.
2020-03-16 16:35:25 -07:00
AArch64StackTaggingPreRA.cpp
MTE: add more unchecked instructions.
2019-11-19 11:19:53 -08:00
AArch64StorePairSuppress.cpp
Add OffsetIsScalable to getMemOperandWithOffset
2020-02-18 15:53:29 +00:00
AArch64Subtarget.cpp
[AArch64] Add NVIDIA Carmel support
2020-05-04 13:52:30 +01:00
AArch64Subtarget.h
[AArch64] Add NVIDIA Carmel support
2020-05-04 13:52:30 +01:00
AArch64SVEInstrInfo.td
[AArch64][SVE] Guard bitcast patterns under IsLE predicate
2020-05-05 13:18:35 +01:00
AArch64SystemOperands.td
[AArch64] Remove inexistent system register ERXTS_EL1
2020-04-29 16:43:48 +01:00
AArch64TargetMachine.cpp
MachineFunctionInfo for AArch64 in MIR
2020-04-17 15:16:59 -07:00
AArch64TargetMachine.h
MachineFunctionInfo for AArch64 in MIR
2020-04-17 15:16:59 -07:00
AArch64TargetObjectFile.cpp
[X86] Reland D71360 Clean up UseInitArray initialization for X86ELFTargetObjectFile
2020-03-20 21:57:34 -07:00
AArch64TargetObjectFile.h
…
AArch64TargetTransformInfo.cpp
[NFC][CostModel] Add TargetCostKind to relevant APIs
2020-05-05 10:35:54 +01:00
AArch64TargetTransformInfo.h
[NFC][CostModel] Add TargetCostKind to relevant APIs
2020-05-05 10:35:54 +01:00
CMakeLists.txt
MachineFunctionInfo for AArch64 in MIR
2020-04-17 15:16:59 -07:00
LLVMBuild.txt
Add Windows Control Flow Guard checks (/guard:cf).
2019-10-28 15:19:39 +00:00
SVEInstrFormats.td
[SVE][Codegen] Lower legal min & max operations
2020-05-04 11:19:19 +01:00
SVEIntrinsicOpts.cpp
[SVEIntrinsicOpts] NFC: Remove unused isReinterpretFromBool for no-assert builds
2020-04-21 09:49:22 +01:00