Roland McGrath 03ff435da5 [RISCV] Default to -ffixed-x18 for Fuchsia ...

Fuchsia's ABI always reserves the x18 (s2) register for the
ShadowCallStack ABI, even when -fsanitize=shadow-call-stack is
not enabled.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D143355

2023-02-05 18:51:18 -08:00

..

Unix

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Windows

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AArch64TargetParser.cpp

[NFC][AArch64] Get extension strings directly from ArchInfo in target parser

2023-01-27 15:17:21 +00:00

ARMTargetParser.cpp

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ARMTargetParserCommon.cpp

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CMakeLists.txt

[TargetParser] Generate the defs for RISCV CPUs using llvm-tblgen.

2023-01-11 11:18:44 +01:00

CSKYTargetParser.cpp

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Host.cpp

[LoongArch] Support getHostCPUName and getHostCPUFeatures

2023-02-01 16:38:15 +08:00

LoongArchTargetParser.cpp

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RISCVTargetParser.cpp

[RISCV] Default to -ffixed-x18 for Fuchsia

2023-02-05 18:51:18 -08:00

TargetParser.cpp

[TargetParser] Generate the defs for RISCV CPUs using llvm-tblgen.

2023-01-11 11:18:44 +01:00

Triple.cpp

[Xtensa 1/10] Recognize Xtensa in triple parsing code

2022-12-26 13:30:51 +01:00

X86TargetParser.cpp

[X86] Support -march=emeraldrapids

2023-01-05 20:27:32 +08:00