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llvm-project/llvm/test/CodeGen
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Matt Arsenault 881e9f2934 AMDGPU: Regenerate test checks 
Mostly a workaround for recent reverts in update_test_checks
2023-07-20 19:26:35 -04:00
..
AArch64
Revert "[MachineLICM] Handle Subloops"
2023-07-20 17:12:25 +01:00
AMDGPU
AMDGPU: Regenerate test checks
2023-07-20 19:26:35 -04:00
ARC
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ARM
[CodeGenPrepare] Refactor optimizeSelectInst (NFC)
2023-07-19 18:56:44 +01:00
AVR
[AVR] Expand shifts of all types except int8 and int16
2023-07-19 11:57:00 +08:00
BPF
[llvm] Remove explicit -opaque-pointers flag from tests (NFC)
2023-07-12 14:35:55 +02:00
CSKY
[CSKY] Optimize conditional select with CLRT/CLRF
2023-07-04 15:22:18 +08:00
DirectX
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Generic
Reland "[DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)"
2023-06-16 00:49:59 +02:00
Hexagon
Revert "[IR] Mark add constant expressions as undesirable"
2023-07-20 18:09:17 +02:00
Inputs
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Lanai
[InstCombine][CGP] Move swapMayExposeCSEOpportunities() fold
2023-06-15 14:17:58 +02:00
LoongArch
[LoongArch] Align functions and loops better according to uarch
2023-07-19 11:25:57 +08:00
M68k
[M68k][MC] Add support for 32 bit register-register multiply/divide
2023-06-29 21:39:41 -07:00
Mips
[DAG] More aggressively (extract_vector_elt (build_vector x, y), c) iff element is zero constant
2023-07-18 17:31:34 +01:00
MIR
Revert "[CodeGen] Store SP adjustment in MachineBasicBlock. NFCI."
2023-07-13 14:25:39 +01:00
MLRegalloc
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MSP430
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NVPTX
Fix shr/and pair replace with bfe
2023-07-11 14:43:35 +01:00
PowerPC
Implement -frecord-command-line for XCOFF integrated assembler path
2023-07-20 09:45:37 -04:00
RISCV
[RISCV] Add memset.inline test coverage with and without V [nfc]
2023-07-20 15:03:53 -07:00
SPARC
[DAG] More aggressively (extract_vector_elt (build_vector x, y), c) iff element is zero constant
2023-07-18 17:31:34 +01:00
SPIRV
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SystemZ
[NFC] Autogenerate CodeGen/SystemZ/int-{uadd,sub}-0*.ll
2023-07-05 20:14:43 +00:00
Thumb
[ARM] don't emit constant pool for Thumb1 XO/stack guard combo
2023-07-19 13:51:43 +01:00
Thumb2
Revert "[MachineLICM] Handle Subloops"
2023-07-20 17:12:25 +01:00
VE
[SelectionDAG] Improve expansion of wide min/max
2023-06-26 10:45:41 -07:00
WebAssembly
Revert "[MachineLICM] Handle Subloops"
2023-07-20 17:12:25 +01:00
WinCFGuard
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WinEH
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X86
[X86] LowerTRUNCATE - use LowerTruncateVecPackWithSignBits for prefer-256 bit AVX512 cases during type legalization
2023-07-20 13:55:28 +01:00
XCore
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