fb2563d137
This proposal adds a `cl::opt` CLI flag `-bpf-allow-misaligned-mem-access` to BPF target that lets users enable allowing misaligned memory accesses. The motivation behind the proposal is user space eBPF VMs (interpreters or JITs running in user space) typically run on real CPUs where unaligned memory accesses are acceptable (or handled efficiently) and can be enabled to simplify lowering and improve performance. In contrast, kernel eBPF must obey verifier constraints and platform-specific alignment restrictions. A new CLI option keeps kernel behavior unchanged while giving userspace VMs an explicit opt-in to enable more permissive codegen. It supports both use-cases without diverging codebases.
139 lines
4.4 KiB
C++
139 lines
4.4 KiB
C++
//===-- BPFSubtarget.cpp - BPF Subtarget Information ----------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the BPF specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "BPFSubtarget.h"
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#include "BPF.h"
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#include "BPFTargetMachine.h"
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#include "GISel/BPFCallLowering.h"
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#include "GISel/BPFLegalizerInfo.h"
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#include "GISel/BPFRegisterBankInfo.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/TargetParser/Host.h"
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using namespace llvm;
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#define DEBUG_TYPE "bpf-subtarget"
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "BPFGenSubtargetInfo.inc"
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static cl::opt<bool> Disable_ldsx("disable-ldsx", cl::Hidden, cl::init(false),
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cl::desc("Disable ldsx insns"));
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static cl::opt<bool> Disable_movsx("disable-movsx", cl::Hidden, cl::init(false),
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cl::desc("Disable movsx insns"));
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static cl::opt<bool> Disable_bswap("disable-bswap", cl::Hidden, cl::init(false),
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cl::desc("Disable bswap insns"));
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static cl::opt<bool> Disable_sdiv_smod("disable-sdiv-smod", cl::Hidden,
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cl::init(false), cl::desc("Disable sdiv/smod insns"));
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static cl::opt<bool> Disable_gotol("disable-gotol", cl::Hidden, cl::init(false),
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cl::desc("Disable gotol insn"));
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static cl::opt<bool>
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Disable_StoreImm("disable-storeimm", cl::Hidden, cl::init(false),
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cl::desc("Disable BPF_ST (immediate store) insn"));
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static cl::opt<bool> Disable_load_acq_store_rel(
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"disable-load-acq-store-rel", cl::Hidden, cl::init(false),
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cl::desc("Disable load-acquire and store-release insns"));
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static cl::opt<bool> Disable_gotox("disable-gotox", cl::Hidden, cl::init(false),
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cl::desc("Disable gotox insn"));
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void BPFSubtarget::anchor() {}
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BPFSubtarget &BPFSubtarget::initializeSubtargetDependencies(StringRef CPU,
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StringRef FS) {
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initializeEnvironment();
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initSubtargetFeatures(CPU, FS);
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ParseSubtargetFeatures(CPU, /*TuneCPU*/ CPU, FS);
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return *this;
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}
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void BPFSubtarget::initializeEnvironment() {
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HasJmpExt = false;
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HasJmp32 = false;
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HasAlu32 = false;
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UseDwarfRIS = false;
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HasLdsx = false;
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HasMovsx = false;
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HasBswap = false;
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HasSdivSmod = false;
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HasGotol = false;
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HasStoreImm = false;
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HasLoadAcqStoreRel = false;
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HasGotox = false;
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AllowsMisalignedMemAccess = false;
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}
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void BPFSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
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if (CPU.empty())
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CPU = "v3";
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if (CPU == "probe")
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CPU = sys::detail::getHostCPUNameForBPF();
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if (CPU == "generic" || CPU == "v1")
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return;
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if (CPU == "v2") {
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HasJmpExt = true;
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return;
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}
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if (CPU == "v3") {
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HasJmpExt = true;
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HasJmp32 = true;
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HasAlu32 = true;
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return;
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}
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if (CPU == "v4") {
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HasJmpExt = true;
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HasJmp32 = true;
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HasAlu32 = true;
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HasLdsx = !Disable_ldsx;
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HasMovsx = !Disable_movsx;
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HasBswap = !Disable_bswap;
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HasSdivSmod = !Disable_sdiv_smod;
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HasGotol = !Disable_gotol;
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HasStoreImm = !Disable_StoreImm;
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HasLoadAcqStoreRel = !Disable_load_acq_store_rel;
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HasGotox = !Disable_gotox;
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return;
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}
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}
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BPFSubtarget::BPFSubtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS, const TargetMachine &TM)
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: BPFGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS),
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InstrInfo(initializeSubtargetDependencies(CPU, FS)), FrameLowering(*this),
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TLInfo(TM, *this) {
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IsLittleEndian = TT.isLittleEndian();
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CallLoweringInfo.reset(new BPFCallLowering(*getTargetLowering()));
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Legalizer.reset(new BPFLegalizerInfo(*this));
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auto *RBI = new BPFRegisterBankInfo(*getRegisterInfo());
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RegBankInfo.reset(RBI);
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InstSelector.reset(createBPFInstructionSelector(
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*static_cast<const BPFTargetMachine *>(&TM), *this, *RBI));
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}
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const CallLowering *BPFSubtarget::getCallLowering() const {
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return CallLoweringInfo.get();
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}
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InstructionSelector *BPFSubtarget::getInstructionSelector() const {
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return InstSelector.get();
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}
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const LegalizerInfo *BPFSubtarget::getLegalizerInfo() const {
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return Legalizer.get();
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}
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const RegisterBankInfo *BPFSubtarget::getRegBankInfo() const {
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return RegBankInfo.get();
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}
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