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llvm-project/llvm/lib/Target/SPIRV
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Matt Arsenault a757c4e74e
CodeGen: Add subtarget to TargetLoweringBase constructor (#168620) 
Currently LibcallLoweringInfo is defined inside of TargetLowering,
which is owned by the subtarget. Pass in the subtarget so we can
construct LibcallLoweringInfo with the subtarget. This is a temporary
step that should be revertable in the future, after LibcallLoweringInfo
is moved out of TargetLowering.
2025-11-19 19:18:13 +00:00
..
Analysis
Remove unused standard headers: memory, unordered_* (#167297)
2025-11-12 17:21:06 +00:00
MCTargetDesc
Remove unused standard headers: memory, unordered_* (#167297)
2025-11-12 17:21:06 +00:00
TargetInfo
[llvm] annotate interfaces in llvm/Target for DLL export (#143615)
2025-06-17 13:28:45 -07:00
CMakeLists.txt
[SPIRV][SPIRVPrepareGlobals] Convert llvm.embedded.module from a 0-element array to a 1-element array (#166950)
2025-11-12 08:47:26 +00:00
SPIRV.h
[SPIRV][SPIRVPrepareGlobals] Convert llvm.embedded.module from a 0-element array to a 1-element array (#166950)
2025-11-12 08:47:26 +00:00
SPIRV.td
…
SPIRVAPI.cpp
[SPIRV] Fix code quality issues. (#152005)
2025-08-06 15:50:00 +01:00
SPIRVAPI.h
…
SPIRVAsmPrinter.cpp
[SPIRV] Fix failing assertion in SPIRVAsmPrinter (#166909)
2025-11-10 11:02:53 +01:00
SPIRVBuiltins.cpp
[SPIRV] Support for the extension SPV_ALTERA_blocking_pipes (#138675)
2025-11-06 11:59:54 +01:00
SPIRVBuiltins.h
[SPIR-V] Implement SPV_KHR_float_controls2 (#146941)
2025-09-30 16:01:30 +01:00
SPIRVBuiltins.td
[SPIRV] Support for the extension SPV_ALTERA_blocking_pipes (#138675)
2025-11-06 11:59:54 +01:00
SPIRVCallLowering.cpp
[NFC][SPIRV] Fix function type recovery (#165934)
2025-11-03 19:30:04 +02:00
SPIRVCallLowering.h
…
SPIRVCBufferAccess.cpp
[HLSL][DirectX] Use a padding type for HLSL buffers. (#167404)
2025-11-18 13:38:43 -08:00
SPIRVCBufferAccess.h
[SPIRV][HLSL] Implement CBuffer access lowering pass (#159136)
2025-09-22 09:01:48 -04:00
SPIRVCombine.td
[NFC] [SPIRV] Add SPIRVCombinerHelper and refactor pre legalizer combiner to use it (#162735)
2025-10-11 09:29:07 +09:00
SPIRVCombinerHelper.cpp
[NFC] [SPIRV] Add SPIRVCombinerHelper and refactor pre legalizer combiner to use it (#162735)
2025-10-11 09:29:07 +09:00
SPIRVCombinerHelper.h
[NFC] [SPIRV] Add SPIRVCombinerHelper and refactor pre legalizer combiner to use it (#162735)
2025-10-11 09:29:07 +09:00
SPIRVCommandLine.cpp
[SPIRV] Add support for bfloat16 atomics via the SPV_INTEL_16bit_atomics extension (#166257)
2025-11-09 17:26:14 +00:00
SPIRVCommandLine.h
[SPIRV] Filter disallowed extensions for env (#150051)
2025-08-18 18:33:58 +00:00
SPIRVEmitIntrinsics.cpp
[HLSL][DirectX] Use a padding type for HLSL buffers. (#167404)
2025-11-18 13:38:43 -08:00
SPIRVEmitNonSemanticDI.cpp
[llvm][DebugInfo][NFC] Abstract DICompileUnit::SourceLanguage to allow alternate DWARF SourceLanguage encoding (#162255)
2025-10-08 18:27:22 +01:00
SPIRVFrameLowering.h
…
SPIRVGlobalRegistry.cpp
[HLSL] Implement ddx/ddy_coarse intrinsics (#164831)
2025-11-18 16:41:07 +01:00
SPIRVGlobalRegistry.h
[NFC][SPIRV] Move common SPIRV::LinkageType deduction code to a helper in SPIRVUtils (#164248)
2025-10-20 16:30:00 +00:00
SPIRVInlineAsmLowering.cpp
…
SPIRVInlineAsmLowering.h
…
SPIRVInstrFormats.td
…
SPIRVInstrInfo.cpp
CodeGen: Keep reference to TargetRegisterInfo in TargetInstrInfo (#158224)
2025-11-10 22:40:39 +00:00
SPIRVInstrInfo.h
[SPIRV] Print split 64-bit OpSwitch operands as a single operand for text output (#164886)
2025-10-27 16:03:46 +00:00
SPIRVInstrInfo.td
[SPIRV] Support for the extension SPV_ALTERA_blocking_pipes (#138675)
2025-11-06 11:59:54 +01:00
SPIRVInstructionSelector.cpp
[HLSL] Implement ddx/ddy_coarse intrinsics (#164831)
2025-11-18 16:41:07 +01:00
SPIRVIRMapping.h
Remove unused <type_traits> inclusion
2025-11-11 13:33:38 +01:00
SPIRVISelLowering.cpp
CodeGen: Add subtarget to TargetLoweringBase constructor (#168620)
2025-11-19 19:18:13 +00:00
SPIRVISelLowering.h
CodeGen: Add subtarget to TargetLoweringBase constructor (#168620)
2025-11-19 19:18:13 +00:00
SPIRVLegalizeImplicitBinding.cpp
[SPIRV][SPIRVLegalizeImplicitBinding] Implement getPassName (#162058)
2025-10-08 10:16:39 +00:00
SPIRVLegalizePointerCast.cpp
[SPIRV] Handle ptrcast between array and vector types (#166418)
2025-11-12 10:27:31 -05:00
SPIRVLegalizerInfo.cpp
[AArch64][GlobalISel] Add G_FMODF instruction (#160061)
2025-10-02 10:30:31 +01:00
SPIRVLegalizerInfo.h
[SPIRV] Support G_IS_FPCLASS (#148637)
2025-07-30 12:28:30 +01:00
SPIRVMCInstLower.cpp
[SPIRV] Print split 64-bit OpSwitch operands as a single operand for text output (#164886)
2025-10-27 16:03:46 +00:00
SPIRVMCInstLower.h
…
SPIRVMergeRegionExitTargets.cpp
[Target] Add "override" where appropriate (NFC) (#165083)
2025-10-25 06:23:43 -07:00
SPIRVMetadata.cpp
…
SPIRVMetadata.h
…
SPIRVModuleAnalysis.cpp
[HLSL] Implement ddx/ddy_coarse intrinsics (#164831)
2025-11-18 16:41:07 +01:00
SPIRVModuleAnalysis.h
[llvm] Use "= default" (NFC) (#166088)
2025-11-02 17:16:47 -08:00
SPIRVPassRegistry.def
[SPIRV][HLSL] Implement CBuffer access lowering pass (#159136)
2025-09-22 09:01:48 -04:00
SPIRVPostLegalizer.cpp
[SPIRV] Use a worklist in the post-legalizer (#165027)
2025-11-17 12:21:46 -05:00
SPIRVPreLegalizer.cpp
[llvm] Use llvm::size (NFC) (#168675)
2025-11-19 07:29:57 -08:00
SPIRVPreLegalizerCombiner.cpp
[NFC] [SPIRV] Add SPIRVCombinerHelper and refactor pre legalizer combiner to use it (#162735)
2025-10-11 09:29:07 +09:00
SPIRVPrepareFunctions.cpp
[SPIRV] Handle unknown intrinsics (#166284)
2025-11-06 10:42:58 +00:00
SPIRVPrepareGlobals.cpp
[SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (#166952)
2025-11-12 10:44:55 +00:00
SPIRVRegisterBankInfo.cpp
…
SPIRVRegisterBankInfo.h
…
SPIRVRegisterBanks.td
…
SPIRVRegisterInfo.cpp
[SPIRV] Remove unused includes (NFC) (#141450)
2025-05-26 09:13:43 -07:00
SPIRVRegisterInfo.h
…
SPIRVRegisterInfo.td
…
SPIRVRegularizer.cpp
[SPIRV] Remove unused includes (NFC) (#141450)
2025-05-26 09:13:43 -07:00
SPIRVStripConvergentIntrinsics.cpp
[Target] Add "override" where appropriate (NFC) (#165083)
2025-10-25 06:23:43 -07:00
SPIRVStructurizer.cpp
[Target] Add "override" where appropriate (NFC) (#165083)
2025-10-25 06:23:43 -07:00
SPIRVStructurizerWrapper.h
…
SPIRVSubtarget.cpp
[NFC][SPIRV] Add AMDGCN SPIR-V specific defaults to the BE (#165815)
2025-11-04 12:45:53 +00:00
SPIRVSubtarget.h
[SPIRV] Change how to detect OpenCL/Vulkan Env and update tests accordingly. (#129689)
2025-06-03 09:50:23 -04:00
SPIRVSymbolicOperands.td
[SPIRV] Add support for bfloat16 atomics via the SPV_INTEL_16bit_atomics extension (#166257)
2025-11-09 17:26:14 +00:00
SPIRVTargetMachine.cpp
[SPIRV][SPIRVPrepareGlobals] Convert llvm.embedded.module from a 0-element array to a 1-element array (#166950)
2025-11-12 08:47:26 +00:00
SPIRVTargetMachine.h
…
SPIRVTargetObjectFile.h
…
SPIRVTargetTransformInfo.cpp
[SPIRV] Add logic for OpGenericCastToPtrExplicit rewriting (#146596)
2025-07-10 15:21:39 +01:00
SPIRVTargetTransformInfo.h
[VectorCombine][TTI] Prevent extract/ins rewrite to GEP (#150216)
2025-07-31 14:14:00 +02:00
SPIRVUtils.cpp
[SPIRV] Print split 64-bit OpSwitch operands as a single operand for text output (#164886)
2025-10-27 16:03:46 +00:00
SPIRVUtils.h
[NFC][SPIRV] Move common SPIRV::LinkageType deduction code to a helper in SPIRVUtils (#164248)
2025-10-20 16:30:00 +00:00