f05bd9c2e0
In DXIL, some 64bit types are actually represented with their 32bit counterpart. This was already being address in the codegen, however the metadata generation was lacking this information. This PR is fixing this issue. Closes: [#146735](https://github.com/llvm/llvm-project/issues/146735)
201 lines
7.2 KiB
LLVM
201 lines
7.2 KiB
LLVM
; RUN: opt -S -disable-output -passes="print<dxil-resources>" < %s 2>&1 | FileCheck %s
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@G = external constant <4 x float>, align 4
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@Zero.str = private unnamed_addr constant [5 x i8] c"Zero\00", align 1
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@One.str = private unnamed_addr constant [4 x i8] c"One\00", align 1
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@Two.str = private unnamed_addr constant [4 x i8] c"Two\00", align 1
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@Three.str = private unnamed_addr constant [6 x i8] c"Three\00", align 1
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@Four.str = private unnamed_addr constant [5 x i8] c"Four\00", align 1
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@Array.str = private unnamed_addr constant [6 x i8] c"Array\00", align 1
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@Five.str = private unnamed_addr constant [5 x i8] c"Five\00", align 1
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@Six.str = private unnamed_addr constant [4 x i8] c"Six\00", align 1
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@CB.str = private unnamed_addr constant [3 x i8] c"CB\00", align 1
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@Constants.str = private unnamed_addr constant [10 x i8] c"Constants\00", align 1
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define void @test_typedbuffer() {
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; ByteAddressBuffer Buf : register(t8, space1)
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%srv0 = call target("dx.RawBuffer", void, 0, 0)
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@llvm.dx.resource.handlefrombinding(i32 1, i32 8, i32 1, i32 0, ptr @Zero.str)
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; CHECK: Resource [[SRV0:[0-9]+]]:
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; CHECK: Name: Zero
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; CHECK: Binding:
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; CHECK: Record ID: 0
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; CHECK: Space: 1
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; CHECK: Lower Bound: 8
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; CHECK: Size: 1
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; CHECK: Class: SRV
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; CHECK: Kind: RawBuffer
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; struct S { float4 a; uint4 b; };
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; StructuredBuffer<S> Buf : register(t2, space4)
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%srv1 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0)
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@llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 1, i32 0, ptr @One.str)
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; CHECK: Resource [[SRV1:[0-9]+]]:
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; CHECK: Name: One
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; CHECK: Binding:
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; CHECK: Record ID: 1
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; CHECK: Space: 4
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; CHECK: Lower Bound: 2
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; CHECK: Size: 1
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; CHECK: Class: SRV
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; CHECK: Kind: StructuredBuffer
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; CHECK: Buffer Stride: 32
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; CHECK: Alignment: 4
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; Buffer<uint4> Buf[24] : register(t3, space5)
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%srv2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0)
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@llvm.dx.resource.handlefrombinding(i32 5, i32 3, i32 24, i32 0, ptr @Two.str)
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; CHECK: Resource [[SRV2:[0-9]+]]:
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; CHECK: Name: Two
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; CHECK: Binding:
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; CHECK: Record ID: 2
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; CHECK: Space: 5
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; CHECK: Lower Bound: 3
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; CHECK: Size: 24
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; CHECK: Class: SRV
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; CHECK: Kind: Buffer
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; CHECK: Element Type: u32
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; CHECK: Element Count: 4
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; RWBuffer<int> Buf : register(u7, space2)
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%uav0 = call target("dx.TypedBuffer", i32, 1, 0, 1)
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@llvm.dx.resource.handlefrombinding(i32 2, i32 7, i32 1, i32 0, ptr @Three.str)
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; CHECK: Resource [[UAV0:[0-9]+]]:
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; CHECK: Name: Three
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; CHECK: Binding:
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; CHECK: Record ID: 0
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; CHECK: Space: 2
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; CHECK: Lower Bound: 7
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; CHECK: Size: 1
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; CHECK: Globally Coherent: 0
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; CHECK: Counter Direction: Unknown
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; CHECK: Class: UAV
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; CHECK: Kind: Buffer
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; CHECK: IsROV: 0
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; CHECK: Element Type: i32
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; CHECK: Element Count: 1
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; RWBuffer<float4> Buf : register(u5, space3)
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%uav1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
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@llvm.dx.resource.handlefrombinding(i32 3, i32 5, i32 1, i32 0, ptr @Four.str)
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call i32 @llvm.dx.resource.updatecounter(target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %uav1, i8 -1)
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; CHECK: Resource [[UAV1:[0-9]+]]:
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; CHECK: Name: Four
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; CHECK: Binding:
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; CHECK: Record ID: 1
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; CHECK: Space: 3
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; CHECK: Lower Bound: 5
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; CHECK: Size: 1
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; CHECK: Globally Coherent: 0
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; CHECK: Counter Direction: Decrement
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; CHECK: Class: UAV
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; CHECK: Kind: Buffer
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; CHECK: IsROV: 0
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; CHECK: Element Type: f32
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; CHECK: Element Count: 4
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; RWBuffer<float4> BufferArray[10] : register(u0, space4)
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; RWBuffer<float4> Buf = BufferArray[0]
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%uav2_1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
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@llvm.dx.resource.handlefrombinding(i32 4, i32 0, i32 10, i32 0, ptr @Array.str)
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; RWBuffer<float4> Buf = BufferArray[5]
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%uav2_2 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
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@llvm.dx.resource.handlefrombinding(i32 4, i32 0, i32 10, i32 5, ptr @Array.str)
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call i32 @llvm.dx.resource.updatecounter(target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %uav2_2, i8 1)
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; CHECK: Resource [[UAV2:[0-9]+]]:
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; CHECK: Name: Array
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; CHECK: Binding:
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; CHECK: Record ID: 2
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; CHECK: Space: 4
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; CHECK: Lower Bound: 0
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; CHECK: Size: 10
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; CHECK: Globally Coherent: 0
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; CHECK: Counter Direction: Increment
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; CHECK: Class: UAV
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; CHECK: Kind: Buffer
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; CHECK: IsROV: 0
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; CHECK: Element Type: f32
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; CHECK: Element Count: 4
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; RWBuffer<float4> Buf : register(u0, space5)
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%uav3 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
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@llvm.dx.resource.handlefrombinding(i32 5, i32 0, i32 1, i32 0, ptr @Five.str)
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call i32 @llvm.dx.resource.updatecounter(target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %uav3, i8 -1)
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call i32 @llvm.dx.resource.updatecounter(target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %uav3, i8 1)
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; CHECK: Resource [[UAV3:[0-9]+]]:
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; CHECK: Name: Five
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; CHECK: Binding:
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; CHECK: Record ID: 3
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; CHECK: Space: 5
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; CHECK: Lower Bound: 0
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; CHECK: Size: 1
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; CHECK: Globally Coherent: 0
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; CHECK: Counter Direction: Invalid
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; CHECK: Class: UAV
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; CHECK: Kind: Buffer
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; CHECK: IsROV: 0
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; CHECK: Element Type: f32
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; CHECK: Element Count: 4
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%uav4 = call target("dx.TypedBuffer", double, 1, 0, 0)
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@llvm.dx.resource.handlefrombinding(i32 5, i32 0, i32 1, i32 0, ptr @Six.str)
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; CHECK: Resource [[UAV4:[0-9]+]]:
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; CHECK: Name: Six
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; CHECK: Binding:
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; CHECK: Record ID: 4
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; CHECK: Space: 5
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; CHECK: Lower Bound: 0
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; CHECK: Size: 1
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; CHECK: Globally Coherent: 0
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; CHECK: Counter Direction: Unknown
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; CHECK: Class: UAV
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; CHECK: Kind: Buffer
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; CHECK: IsROV: 0
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; CHECK: Element Type: f64 (stored as u32)
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; CHECK: Element Count: 1
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%cb0 = call target("dx.CBuffer", {float})
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@llvm.dx.resource.handlefrombinding(i32 1, i32 0, i32 1, i32 0, ptr @CB.str)
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; CHECK: Resource [[CB0:[0-9]+]]:
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; CHECK: Name: CB
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; CHECK: Binding:
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; CHECK: Record ID: 0
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; CHECK: Space: 1
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; CHECK: Lower Bound: 0
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; CHECK: Size: 1
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; CHECK: Class: CBV
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; CHECK: Kind: CBuffer
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; CHECK: CBuffer size: 4
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%cb1 = call target("dx.CBuffer", <{ [2 x <{ float, target("dx.Padding", 12) }>], float }>)
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@llvm.dx.resource.handlefrombinding(i32 1, i32 8, i32 1, i32 0, ptr @Constants.str)
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; CHECK: Resource [[CB1:[0-9]+]]:
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; CHECK: Name: Constants
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; CHECK: Binding:
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; CHECK: Record ID: 1
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; CHECK: Space: 1
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; CHECK: Lower Bound: 8
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; CHECK: Size: 1
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; CHECK: Class: CBV
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; CHECK: Kind: CBuffer
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; CHECK: CBuffer size: 36
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; CHECK-NOT: Resource {{[0-9]+}}:
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ret void
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}
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; CHECK-DAG: Call bound to [[SRV0]]: %srv0 =
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; CHECK-DAG: Call bound to [[SRV1]]: %srv1 =
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; CHECK-DAG: Call bound to [[SRV2]]: %srv2 =
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; CHECK-DAG: Call bound to [[UAV0]]: %uav0 =
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; CHECK-DAG: Call bound to [[UAV1]]: %uav1 =
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; CHECK-DAG: Call bound to [[UAV2]]: %uav2_1 =
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; CHECK-DAG: Call bound to [[UAV2]]: %uav2_2 =
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; CHECK-DAG: Call bound to [[UAV4]]: %uav4 =
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; CHECK-DAG: Call bound to [[CB0]]: %cb0 =
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; CHECK-DAG: Call bound to [[CB1]]: %cb1 =
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attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) }
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