f9b080cf5f
This commit custom legalize `ConstantFP` using code sequence rather than simpily loading the fp values from constant pool. A new option (`-loongarch-materialize-float-imm=<enum>`) is added to set the maximum number of instructions (including code sequence to generate the value and moving the value to FPR) alllowed to be used when materializing floating-point immediates. The default value of the option is set to `3` on both LA32 and LA64. Which means: - For `f32` on both LA32 and LA64: `2 insts + movgr2fr.w`; (will cover all `f32` values) - For `f64` on LA64: `2 insts + movgr2fr.d`; - For `f64` on LA32: `1 inst + movgr2fr.w + movgr2frh.w`. (same inst latency as using constant pool) The option can be set in range `0,2-6`. (6 behaves same as 5 on LA64.)
155 lines
5.3 KiB
LLVM
155 lines
5.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 --mattr=+f,-d -loongarch-materialize-float-imm=0 < %s | FileCheck %s --check-prefixes=LA32,LA32-0
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; RUN: llc --mtriple=loongarch32 --mattr=+f,-d -loongarch-materialize-float-imm=2 < %s | FileCheck %s --check-prefixes=LA32,LA32-2
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; RUN: llc --mtriple=loongarch32 --mattr=+f,-d -loongarch-materialize-float-imm=3 < %s | FileCheck %s --check-prefixes=LA32,LA32-3
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; RUN: llc --mtriple=loongarch32 --mattr=+f,-d -loongarch-materialize-float-imm=4 < %s | FileCheck %s --check-prefixes=LA32,LA32-3
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; RUN: llc --mtriple=loongarch32 --mattr=+f,-d -loongarch-materialize-float-imm=5 < %s | FileCheck %s --check-prefixes=LA32,LA32-3
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; RUN: llc --mtriple=loongarch32 --mattr=+f,-d -loongarch-materialize-float-imm=6 < %s | FileCheck %s --check-prefixes=LA32,LA32-3
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; RUN: llc --mtriple=loongarch64 --mattr=+f,-d -loongarch-materialize-float-imm=0 < %s | FileCheck %s --check-prefixes=LA64,LA64-0
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; RUN: llc --mtriple=loongarch64 --mattr=+f,-d -loongarch-materialize-float-imm=2 < %s | FileCheck %s --check-prefixes=LA64,LA64-2
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; RUN: llc --mtriple=loongarch64 --mattr=+f,-d -loongarch-materialize-float-imm=3 < %s | FileCheck %s --check-prefixes=LA64,LA64-3
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; RUN: llc --mtriple=loongarch64 --mattr=+f,-d -loongarch-materialize-float-imm=4 < %s | FileCheck %s --check-prefixes=LA64,LA64-3
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; RUN: llc --mtriple=loongarch64 --mattr=+f,-d -loongarch-materialize-float-imm=5 < %s | FileCheck %s --check-prefixes=LA64,LA64-3
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; RUN: llc --mtriple=loongarch64 --mattr=+f,-d -loongarch-materialize-float-imm=6 < %s | FileCheck %s --check-prefixes=LA64,LA64-3
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define float @f32_positive_zero() nounwind {
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; LA32-LABEL: f32_positive_zero:
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; LA32: # %bb.0:
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; LA32-NEXT: movgr2fr.w $fa0, $zero
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; LA32-NEXT: ret
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;
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; LA64-LABEL: f32_positive_zero:
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; LA64: # %bb.0:
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; LA64-NEXT: movgr2fr.w $fa0, $zero
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; LA64-NEXT: ret
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ret float 0.0
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}
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define float @f32_negative_zero() nounwind {
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; LA32-LABEL: f32_negative_zero:
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; LA32: # %bb.0:
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; LA32-NEXT: movgr2fr.w $fa0, $zero
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; LA32-NEXT: fneg.s $fa0, $fa0
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; LA32-NEXT: ret
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;
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; LA64-LABEL: f32_negative_zero:
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; LA64: # %bb.0:
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; LA64-NEXT: movgr2fr.w $fa0, $zero
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; LA64-NEXT: fneg.s $fa0, $fa0
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; LA64-NEXT: ret
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ret float -0.0
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}
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define float @f32_constant_ins1() nounwind {
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; LA32-0-LABEL: f32_constant_ins1:
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; LA32-0: # %bb.0:
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; LA32-0-NEXT: pcalau12i $a0, %pc_hi20(.LCPI2_0)
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; LA32-0-NEXT: fld.s $fa0, $a0, %pc_lo12(.LCPI2_0)
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; LA32-0-NEXT: ret
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;
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; LA32-2-LABEL: f32_constant_ins1:
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; LA32-2: # %bb.0:
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; LA32-2-NEXT: lu12i.w $a0, 270336
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; LA32-2-NEXT: movgr2fr.w $fa0, $a0
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; LA32-2-NEXT: ret
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;
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; LA32-3-LABEL: f32_constant_ins1:
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; LA32-3: # %bb.0:
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; LA32-3-NEXT: lu12i.w $a0, 270336
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; LA32-3-NEXT: movgr2fr.w $fa0, $a0
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; LA32-3-NEXT: ret
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;
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; LA64-0-LABEL: f32_constant_ins1:
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; LA64-0: # %bb.0:
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; LA64-0-NEXT: pcalau12i $a0, %pc_hi20(.LCPI2_0)
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; LA64-0-NEXT: fld.s $fa0, $a0, %pc_lo12(.LCPI2_0)
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; LA64-0-NEXT: ret
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;
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; LA64-2-LABEL: f32_constant_ins1:
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; LA64-2: # %bb.0:
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; LA64-2-NEXT: lu12i.w $a0, 270336
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; LA64-2-NEXT: movgr2fr.w $fa0, $a0
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; LA64-2-NEXT: ret
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;
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; LA64-3-LABEL: f32_constant_ins1:
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; LA64-3: # %bb.0:
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; LA64-3-NEXT: lu12i.w $a0, 270336
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; LA64-3-NEXT: movgr2fr.w $fa0, $a0
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; LA64-3-NEXT: ret
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ret float 32.0
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}
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define float @f32_constant_pi() nounwind {
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; LA32-0-LABEL: f32_constant_pi:
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; LA32-0: # %bb.0:
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; LA32-0-NEXT: pcalau12i $a0, %pc_hi20(.LCPI3_0)
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; LA32-0-NEXT: fld.s $fa0, $a0, %pc_lo12(.LCPI3_0)
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; LA32-0-NEXT: ret
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;
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; LA32-2-LABEL: f32_constant_pi:
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; LA32-2: # %bb.0:
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; LA32-2-NEXT: pcalau12i $a0, %pc_hi20(.LCPI3_0)
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; LA32-2-NEXT: fld.s $fa0, $a0, %pc_lo12(.LCPI3_0)
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; LA32-2-NEXT: ret
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;
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; LA32-3-LABEL: f32_constant_pi:
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; LA32-3: # %bb.0:
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; LA32-3-NEXT: lu12i.w $a0, 263312
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; LA32-3-NEXT: ori $a0, $a0, 4059
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; LA32-3-NEXT: movgr2fr.w $fa0, $a0
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; LA32-3-NEXT: ret
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;
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; LA64-0-LABEL: f32_constant_pi:
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; LA64-0: # %bb.0:
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; LA64-0-NEXT: pcalau12i $a0, %pc_hi20(.LCPI3_0)
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; LA64-0-NEXT: fld.s $fa0, $a0, %pc_lo12(.LCPI3_0)
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; LA64-0-NEXT: ret
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;
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; LA64-2-LABEL: f32_constant_pi:
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; LA64-2: # %bb.0:
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; LA64-2-NEXT: pcalau12i $a0, %pc_hi20(.LCPI3_0)
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; LA64-2-NEXT: fld.s $fa0, $a0, %pc_lo12(.LCPI3_0)
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; LA64-2-NEXT: ret
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;
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; LA64-3-LABEL: f32_constant_pi:
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; LA64-3: # %bb.0:
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; LA64-3-NEXT: lu12i.w $a0, 263312
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; LA64-3-NEXT: ori $a0, $a0, 4059
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; LA64-3-NEXT: movgr2fr.w $fa0, $a0
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; LA64-3-NEXT: ret
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ret float 3.14159274101257324218750
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}
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define float @f32_add_fimm1(float %a) nounwind {
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; LA32-LABEL: f32_add_fimm1:
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; LA32: # %bb.0:
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; LA32-NEXT: lu12i.w $a0, 260096
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; LA32-NEXT: movgr2fr.w $fa1, $a0
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; LA32-NEXT: fadd.s $fa0, $fa0, $fa1
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; LA32-NEXT: ret
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;
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; LA64-LABEL: f32_add_fimm1:
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; LA64: # %bb.0:
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; LA64-NEXT: lu12i.w $a0, 260096
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; LA64-NEXT: movgr2fr.w $fa1, $a0
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; LA64-NEXT: fadd.s $fa0, $fa0, $fa1
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; LA64-NEXT: ret
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%1 = fadd float %a, 1.0
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ret float %1
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}
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define float @f32_positive_fimm1() nounwind {
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; LA32-LABEL: f32_positive_fimm1:
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; LA32: # %bb.0:
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; LA32-NEXT: lu12i.w $a0, 260096
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; LA32-NEXT: movgr2fr.w $fa0, $a0
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; LA32-NEXT: ret
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;
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; LA64-LABEL: f32_positive_fimm1:
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; LA64: # %bb.0:
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; LA64-NEXT: lu12i.w $a0, 260096
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; LA64-NEXT: movgr2fr.w $fa0, $a0
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; LA64-NEXT: ret
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ret float 1.0
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}
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