3537e8abfa
For subregister copies, do a subregister live check instead of checking the main range. Doesn't do much yet, the split analysis still does not track live ranges.
479 lines
10 KiB
LLVM
479 lines
10 KiB
LLVM
; Test that floating-point compares are omitted if CC already has the
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; right value.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 -no-integrated-as | FileCheck %s
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declare float @llvm.fabs.f32(float %f)
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; Test addition followed by EQ, which can use the CC result of the addition.
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define float @f1(float %a, float %b, ptr %dest) {
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; CHECK-LABEL: f1:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: ber %r14
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; CHECK: br %r14
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entry:
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%res = fadd float %a, %b
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%cmp = fcmp oeq float %res, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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; ...and again with LT.
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define float @f2(float %a, float %b, ptr %dest) {
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; CHECK-LABEL: f2:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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%res = fadd float %a, %b
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%cmp = fcmp olt float %res, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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; ...and again with GT.
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define float @f3(float %a, float %b, ptr %dest) {
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; CHECK-LABEL: f3:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: bhr %r14
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; CHECK: br %r14
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entry:
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%res = fadd float %a, %b
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%cmp = fcmp ogt float %res, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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; ...and again with UEQ.
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define float @f4(float %a, float %b, ptr %dest) {
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; CHECK-LABEL: f4:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: bnlhr %r14
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; CHECK: br %r14
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entry:
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%res = fadd float %a, %b
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%cmp = fcmp ueq float %res, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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; Subtraction also provides a zero-based CC value.
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define float @f5(float %a, float %b, ptr %dest) {
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; CHECK-LABEL: f5:
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; CHECK: seb %f0, 0(%r2)
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; CHECK-NEXT: bnher %r14
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; CHECK: br %r14
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entry:
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%cur = load float, ptr %dest
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%res = fsub float %a, %cur
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%cmp = fcmp ult float %res, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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; Test the result of LOAD POSITIVE.
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define float @f6(float %dummy, float %a, ptr %dest) {
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; CHECK-LABEL: f6:
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; CHECK: lpebr %f0, %f2
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; CHECK-NEXT: bhr %r14
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; CHECK: br %r14
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entry:
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%res = call float @llvm.fabs.f32(float %a)
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%cmp = fcmp ogt float %res, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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; Test the result of LOAD NEGATIVE.
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define float @f7(float %dummy, float %a, ptr %dest) {
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; CHECK-LABEL: f7:
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; CHECK: lnebr %f0, %f2
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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%abs = call float @llvm.fabs.f32(float %a)
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%res = fneg float %abs
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%cmp = fcmp olt float %res, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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; Test the result of LOAD COMPLEMENT.
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define float @f8(float %dummy, float %a, ptr %dest) {
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; CHECK-LABEL: f8:
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; CHECK: lcebr %f0, %f2
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; CHECK-NEXT: bler %r14
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; CHECK: br %r14
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entry:
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%res = fneg float %a
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%cmp = fcmp ole float %res, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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; Multiplication (for example) does not modify CC.
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define float @f9(float %a, float %b, ptr %dest) {
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; CHECK-LABEL: f9:
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; CHECK: meebr %f0, %f2
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; CHECK-NEXT: ltebr %f1, %f0
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; CHECK-NEXT: blhr %r14
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; CHECK: br %r14
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entry:
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%res = fmul float %a, %b
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%cmp = fcmp one float %res, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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; Test a combination involving a CC-setting instruction followed by
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; a non-CC-setting instruction.
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define float @f10(float %a, float %b, float %c, ptr %dest) {
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; CHECK-LABEL: f10:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: debr %f0, %f4
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; CHECK-NEXT: ltebr %f1, %f0
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; CHECK-NEXT: bner %r14
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; CHECK: br %r14
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entry:
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%add = fadd float %a, %b
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%res = fdiv float %add, %c
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%cmp = fcmp une float %res, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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; Test a case where CC is set based on a different register from the
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; compare input.
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define float @f11(float %a, float %b, float %c, ptr %dest1, ptr %dest2) {
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; CHECK-LABEL: f11:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: sebr %f4, %f0
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; CHECK-DAG: ste %f4, 0(%r2)
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; CHECK-DAG: ltebr %f1, %f0
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; CHECK-NEXT: ber %r14
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; CHECK: br %r14
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entry:
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%add = fadd float %a, %b
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%sub = fsub float %c, %add
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store float %sub, ptr %dest1
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%cmp = fcmp oeq float %add, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %sub, ptr %dest2
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br label %exit
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exit:
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ret float %add
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}
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define half @f12_half(half %dummy, half %val, ptr %dest) {
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; CHECK-LABEL: f12_half:
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; CHECK: ler %f8, %f2
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; CHECK-NEXT: ler %f0, %f2
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; CHECK-NEXT: #APP
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; CHECK-NEXT: blah %f0
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: brasl %r14, __extendhfsf2@PLT
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; CHECK-NEXT: ltebr %f1, %f0
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; CHECK-NEXT: jl .LBB11_2
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; CHECK-NEXT:# %bb.1:
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; CHECK-NEXT: lgdr %r0, %f8
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; CHECK-NEXT: srlg %r0, %r0, 48
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; CHECK-NEXT: sth %r0, 0(%r13)
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; CHECK-NEXT:.LBB11_2:
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; CHECK-NEXT: ler %f0, %f8
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; CHECK-NEXT: ld %f8, 160(%r15)
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; CHECK-NEXT: lmg %r13, %r15, 272(%r15)
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; CHECK-NEXT: br %r14
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entry:
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call void asm sideeffect "blah $0", "{f0}"(half %val)
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%cmp = fcmp olt half %val, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store half %val, ptr %dest
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br label %exit
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exit:
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ret half %val
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}
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; %val in %f2 must be preserved during comparison and also copied to %f0.
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define float @f12(float %dummy, float %val, ptr %dest) {
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; CHECK-LABEL: f12:
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; CHECK: ler %f0, %f2
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; CHECK-NEXT: ltebr %f1, %f2
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; CHECK-NEXT: #APP
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; CHECK-NEXT: blah %f0
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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call void asm sideeffect "blah $0", "{f0}"(float %val)
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%cmp = fcmp olt float %val, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %val, ptr %dest
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br label %exit
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exit:
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ret float %val
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}
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; Same for double.
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define double @f13(double %dummy, double %val, ptr %dest) {
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; CHECK-LABEL: f13:
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; CHECK: ldr %f0, %f2
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; CHECK-NEXT: ltdbr %f1, %f2
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; CHECK-NEXT: #APP
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; CHECK-NEXT: blah %f0
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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call void asm sideeffect "blah $0", "{f0}"(double %val)
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%cmp = fcmp olt double %val, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store double %val, ptr %dest
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br label %exit
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exit:
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ret double %val
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}
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; LXR cannot be converted to LTXBR as its input is live after it.
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define void @f14(ptr %ptr1, ptr %ptr2) {
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; CHECK-LABEL: f14:
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; CHECK: lxr
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; CHECK-NEXT: dxbr
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; CHECK-NEXT: std
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; CHECK-NEXT: std
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; CHECK-NEXT: mxbr
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; CHECK-NEXT: ltxbr
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; CHECK-NEXT: std
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; CHECK-NEXT: std
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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%val1 = load fp128, ptr %ptr1
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%val2 = load fp128, ptr %ptr2
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%div = fdiv fp128 %val1, %val2
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store fp128 %div, ptr %ptr1
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%mul = fmul fp128 %val1, %val2
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store fp128 %mul, ptr %ptr2
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%cmp = fcmp olt fp128 %val1, 0xL00000000000000000000000000000000
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br i1 %cmp, label %exit, label %store
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store:
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call void asm sideeffect "blah", ""()
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br label %exit
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exit:
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ret void
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}
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define half @f15_half(half %val, half %dummy, ptr %dest) {
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; CHECK-LABEL: f15_half:
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; CHECK: ler %f8, %f0
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; CHECK-NEXT: ler %f2, %f0
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; CHECK-NEXT: #APP
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; CHECK-NEXT: blah %f2
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: brasl %r14, __extendhfsf2@PLT
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; CHECK-NEXT: ltebr %f1, %f0
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; CHECK-NEXT: jl .LBB15_2
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; CHECK-NEXT:# %bb.1:
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; CHECK-NEXT: lgdr %r0, %f8
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; CHECK-NEXT: srlg %r0, %r0, 48
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; CHECK-NEXT: sth %r0, 0(%r13)
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; CHECK-NEXT:.LBB15_2:
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; CHECK-NEXT: ler %f0, %f8
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; CHECK-NEXT: ld %f8, 160(%r15)
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; CHECK-NEXT: lmg %r13, %r15, 272(%r15)
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; CHECK-NEXT: br %r14
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entry:
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call void asm sideeffect "blah $0", "{f2}"(half %val)
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%cmp = fcmp olt half %val, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store half %val, ptr %dest
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br label %exit
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exit:
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ret half %val
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}
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define float @f15(float %val, float %dummy, ptr %dest) {
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; CHECK-LABEL: f15:
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; CHECK: ltebr %f1, %f0
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; CHECK-NEXT: ler %f2, %f0
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; CHECK-NEXT: #APP
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; CHECK-NEXT: blah %f2
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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call void asm sideeffect "blah $0", "{f2}"(float %val)
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%cmp = fcmp olt float %val, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %val, ptr %dest
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br label %exit
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exit:
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ret float %val
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}
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define double @f16(double %val, double %dummy, ptr %dest) {
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; CHECK-LABEL: f16:
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; CHECK: ltdbr %f1, %f0
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; CHECK: ldr %f2, %f0
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; CHECK-NEXT: #APP
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; CHECK-NEXT: blah %f2
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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call void asm sideeffect "blah $0", "{f2}"(double %val)
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%cmp = fcmp olt double %val, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store double %val, ptr %dest
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br label %exit
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exit:
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ret double %val
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}
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; Repeat f2 with a comparison against -0.
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define float @f17(float %a, float %b, ptr %dest) {
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; CHECK-LABEL: f17:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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%res = fadd float %a, %b
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%cmp = fcmp olt float %res, -0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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; Test another form of f7 in which the condition is based on the unnegated
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; result. This is what InstCombine would produce.
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define float @f18(float %dummy, float %a, ptr %dest) {
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; CHECK-LABEL: f18:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lnebr %f0, %f2
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; CHECK-NEXT: blr %r14
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; CHECK-NEXT: .LBB19_1: # %store
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; CHECK-NEXT: ste %f0, 0(%r2)
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; CHECK-NEXT: br %r14
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entry:
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%abs = call float @llvm.fabs.f32(float %a)
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%res = fneg float %abs
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%cmp = fcmp ogt float %abs, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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; Similarly for f8.
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define float @f19(float %dummy, float %a, ptr %dest) {
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; CHECK-LABEL: f19:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lcebr %f0, %f2
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; CHECK-NEXT: bler %r14
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; CHECK-NEXT: .LBB20_1: # %store
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; CHECK-NEXT: ste %f0, 0(%r2)
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; CHECK-NEXT: br %r14
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entry:
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%res = fneg float %a
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%cmp = fcmp oge float %a, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, ptr %dest
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br label %exit
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exit:
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ret float %res
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}
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