Matt Arsenault 88bdcbbf1a GlobalISel: Lift store value widening restriction ...

This doesn't change the memory size and doesn't need to worry about
non-power-of-2 sizes.

2020-09-16 14:25:07 -04:00

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AArch64

[AArch64][GlobalISel] Make G_BUILD_VECTOR os <16 x s8> legal.

2020-09-16 11:19:47 -07:00

AMDGPU

GlobalISel: Lift store value widening restriction

2020-09-16 14:25:07 -04:00

ARC

[ARC] Update brcc test.

2020-08-28 17:07:25 -07:00

ARM

[ARM][MachineOutliner] Add calls handling.

2020-09-16 09:54:26 +02:00

AVR

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BPF

BPF: add a SimplifyCFG IR pass during generic Scalar/IPO optimization

2020-08-06 13:16:00 -07:00

Generic

[Intrinsics] define semantics for experimental fmax/fmin vector reductions

2020-09-12 09:10:28 -04:00

Hexagon

[Hexagon] Replace incorrect pattern for vpackl HWI32 -> HVi8

2020-09-15 20:34:50 -05:00

Inputs

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Lanai

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Mips

Revert "RegAllocFast: Record internal state based on register units"

2020-09-15 13:25:41 +02:00

MIR

[MIRVRegNamer] Experimental MachineInstr stable hashing (Fowler-Noll-Vo)

2020-09-03 16:13:09 -04:00

MSP430

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NVPTX

[NVPTX] Fix typo in lit test

2020-08-17 16:02:11 -04:00

PowerPC

[PowerPC] Implement __int128 vector divide operations

2020-09-15 15:19:35 -04:00

RISCV

[RISC-V] ADDI/ORI/XORI x, 0 should be as cheap as a move

2020-08-27 10:32:22 +01:00

SPARC

Revert "RegAllocFast: Record internal state based on register units"

2020-09-15 13:25:41 +02:00

SystemZ

[SelectionDAGBuilder] Pass fast math flags to getNode calls rather than trying to set them after the fact.:

2020-09-08 15:27:21 -07:00

Thumb

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Thumb2

[RDA] Fix getUniqueReachingDef for self loops

2020-09-16 12:44:23 +01:00

VE

[VE] Support f128

2020-08-17 17:26:52 +09:00

WebAssembly

[WebAssembly] Fix fixEndsAtEndOfFunction for try-catch

2020-09-08 09:27:40 -07:00

WinCFGuard

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WinEH

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X86

[X86] Don't scalarize gather/scatters with non-power of 2 element counts. Widen instead.

2020-09-15 23:22:53 -07:00

XCore

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