Simon Pilgrim 547dc46122 [DAG] SimplifyDemandedBits - ensure we drop NSW/NUW flags when we simplify a SHL node's input ...

We already do this for variable shifts, but we missed it for constant shifts

Fixes #69965

2023-10-26 10:34:58 +01:00

..

CMakeLists.txt

Split out CodeGenTypes from CodeGen for LLT/MVT

2023-05-03 00:13:20 +09:00

DAGCombiner.cpp

[DAGCombiner] Fix misuse of getZeroExtendInReg in SimplifySelectCC. (#70066)

2023-10-24 12:35:55 -07:00

FastISel.cpp

[FastISel][DebugInfo] Handle dbg.value targeting allocas (#67187)

2023-10-02 07:10:11 -07:00

FunctionLoweringInfo.cpp

[1/11][IR] Permit load/store/alloca for struct of the same scalable vector type

2023-05-19 09:39:36 -07:00

InstrEmitter.cpp

[InlineAsm] refactor InlineAsm class NFC (#65649)

2023-09-11 09:27:37 -07:00

InstrEmitter.h

[DebugInfo] Store instr-ref mode of MachineFunction in member

2023-01-20 14:47:11 +00:00

LegalizeDAG.cpp

[llvm] Remove uses of Type::getPointerTo() (NFC)

2023-09-22 19:44:38 -04:00

LegalizeFloatTypes.cpp

ISel: introduce vector ISD::LRINT, ISD::LLRINT; custom RISCV lowering (#66924)

2023-10-19 13:05:04 +01:00

LegalizeIntegerTypes.cpp

[SelectionDAG][RISCV][PowerPC][X86] Use TargetConstant for immediates for ISD::PREFETCH. (#66601)

2023-09-18 08:58:50 -07:00

LegalizeTypes.cpp

[DAG] Use legal shift amount type in DAGTypeLegalizer::JoinIntegers

2023-07-12 08:12:09 +01:00

LegalizeTypes.h

[DAG] WidenVectorOperand - add basic handling for *_EXTEND_VECTOR_INREG nodes

2023-10-25 16:52:15 +01:00

LegalizeTypesGeneric.cpp

[LegalizeType][X86] Support WidenVecRes_AssertZext and SplitVecRes_AssertZext for ISD::AssertZext during LegalizeType procedure

2023-05-24 10:17:08 +08:00

LegalizeVectorOps.cpp

ISel: introduce vector ISD::LRINT, ISD::LLRINT; custom RISCV lowering (#66924)

2023-10-19 13:05:04 +01:00

LegalizeVectorTypes.cpp

[DAG] WidenVectorOperand - add basic handling for *_EXTEND_VECTOR_INREG nodes

2023-10-25 16:52:15 +01:00

ResourcePriorityQueue.cpp

…

ScheduleDAGFast.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

ScheduleDAGRRList.cpp

[X86]Remove X86-specific dead code in ScheduleDAGRRList.cpp (#67629)

2023-09-30 15:49:37 +08:00

ScheduleDAGSDNodes.cpp

Clean come dead code

2023-04-23 20:46:34 -04:00

ScheduleDAGSDNodes.h

Restore CodeGen/MachineValueType.h from Support

2023-05-03 00:13:20 +09:00

ScheduleDAGVLIW.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

SDNodeDbgValue.h

[DebugInfo] Remove dbg.addr from CodeGen

2023-03-02 09:29:43 +00:00

SelectionDAG.cpp

[SelectionDAG] Salvage debug info for non-constant ADDs (2nd try) (#68981)

2023-10-25 17:01:19 +02:00

SelectionDAGAddressAnalysis.cpp

[X86] Fix aliasing check between TargetFrameIndex and FrameIndex

2023-08-17 10:48:08 +01:00

SelectionDAGBuilder.cpp

[IR] Require that ptrmask mask matches pointer index size (#69343)

2023-10-24 09:54:29 +02:00

SelectionDAGBuilder.h

[StatepointLowering] Take return attributes of gc.result into account (#68439)

2023-10-14 18:38:18 +02:00

SelectionDAGDumper.cpp

IR: Add llvm.exp10 intrinsic

2023-09-01 19:45:03 -04:00

SelectionDAGISel.cpp

[ADT] Rename llvm::erase_value to llvm::erase (NFC) (#70156)

2023-10-24 23:03:13 -07:00

SelectionDAGPrinter.cpp

…

SelectionDAGTargetInfo.cpp

…

StatepointLowering.cpp

[StatepointLowering] Take return attributes of gc.result into account (#68439)

2023-10-14 18:38:18 +02:00

StatepointLowering.h

…

TargetLowering.cpp

[DAG] SimplifyDemandedBits - ensure we drop NSW/NUW flags when we simplify a SHL node's input

2023-10-26 10:34:58 +01:00