This adds an option to CombinerInfo to limit the number of iterations in the Combiner. This option is then used to disable fixed-point iteration for the AArch64O0PreLegalizerCombiner. The combines there are simple enough that code quality impact should be minimal with the current heuristics (instructions are processed from top to bottom of the basic block, new/changed instructions are added back to the worklist). Test changes are due to some instructions not being DCE'd, which has no actual impact because InstructionSelect performs DCE as well. AArch64 CTMark O0: -0.9% geomean compile-time (instruction count) no change in size..text for any of the benchmarks
193 lines
6.6 KiB
C++
193 lines
6.6 KiB
C++
//=== lib/CodeGen/GlobalISel/AArch64O0PreLegalizerCombiner.cpp ------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass does combining of machine instructions at the generic MI level,
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// before the legalizer.
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//
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//===----------------------------------------------------------------------===//
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#include "AArch64GlobalISelUtils.h"
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#include "AArch64TargetMachine.h"
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#include "llvm/CodeGen/GlobalISel/Combiner.h"
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#include "llvm/CodeGen/GlobalISel/CombinerHelper.h"
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#include "llvm/CodeGen/GlobalISel/CombinerInfo.h"
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#include "llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h"
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#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
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#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/Support/Debug.h"
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#define GET_GICOMBINER_DEPS
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#include "AArch64GenO0PreLegalizeGICombiner.inc"
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#undef GET_GICOMBINER_DEPS
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#define DEBUG_TYPE "aarch64-O0-prelegalizer-combiner"
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using namespace llvm;
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using namespace MIPatternMatch;
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namespace {
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#define GET_GICOMBINER_TYPES
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#include "AArch64GenO0PreLegalizeGICombiner.inc"
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#undef GET_GICOMBINER_TYPES
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class AArch64O0PreLegalizerCombinerImpl : public Combiner {
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protected:
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// TODO: Make CombinerHelper methods const.
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mutable CombinerHelper Helper;
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const AArch64O0PreLegalizerCombinerImplRuleConfig &RuleConfig;
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const AArch64Subtarget &STI;
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public:
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AArch64O0PreLegalizerCombinerImpl(
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MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
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GISelKnownBits &KB, GISelCSEInfo *CSEInfo,
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const AArch64O0PreLegalizerCombinerImplRuleConfig &RuleConfig,
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const AArch64Subtarget &STI);
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static const char *getName() { return "AArch64O0PreLegalizerCombiner"; }
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bool tryCombineAll(MachineInstr &I) const override;
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bool tryCombineAllImpl(MachineInstr &I) const;
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private:
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#define GET_GICOMBINER_CLASS_MEMBERS
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#include "AArch64GenO0PreLegalizeGICombiner.inc"
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#undef GET_GICOMBINER_CLASS_MEMBERS
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};
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#define GET_GICOMBINER_IMPL
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#include "AArch64GenO0PreLegalizeGICombiner.inc"
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#undef GET_GICOMBINER_IMPL
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AArch64O0PreLegalizerCombinerImpl::AArch64O0PreLegalizerCombinerImpl(
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MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
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GISelKnownBits &KB, GISelCSEInfo *CSEInfo,
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const AArch64O0PreLegalizerCombinerImplRuleConfig &RuleConfig,
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const AArch64Subtarget &STI)
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: Combiner(MF, CInfo, TPC, &KB, CSEInfo),
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Helper(Observer, B, /*IsPreLegalize*/ true, &KB), RuleConfig(RuleConfig),
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STI(STI),
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#define GET_GICOMBINER_CONSTRUCTOR_INITS
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#include "AArch64GenO0PreLegalizeGICombiner.inc"
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#undef GET_GICOMBINER_CONSTRUCTOR_INITS
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{
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}
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bool AArch64O0PreLegalizerCombinerImpl::tryCombineAll(MachineInstr &MI) const {
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if (tryCombineAllImpl(MI))
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return true;
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unsigned Opc = MI.getOpcode();
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switch (Opc) {
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case TargetOpcode::G_SHUFFLE_VECTOR:
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return Helper.tryCombineShuffleVector(MI);
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case TargetOpcode::G_MEMCPY_INLINE:
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return Helper.tryEmitMemcpyInline(MI);
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case TargetOpcode::G_MEMCPY:
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case TargetOpcode::G_MEMMOVE:
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case TargetOpcode::G_MEMSET: {
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// At -O0 set a maxlen of 32 to inline;
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unsigned MaxLen = 32;
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// Try to inline memcpy type calls if optimizations are enabled.
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if (Helper.tryCombineMemCpyFamily(MI, MaxLen))
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return true;
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if (Opc == TargetOpcode::G_MEMSET)
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return llvm::AArch64GISelUtils::tryEmitBZero(MI, B, CInfo.EnableMinSize);
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return false;
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}
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}
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return false;
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}
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// Pass boilerplate
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// ================
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class AArch64O0PreLegalizerCombiner : public MachineFunctionPass {
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public:
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static char ID;
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AArch64O0PreLegalizerCombiner();
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StringRef getPassName() const override {
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return "AArch64O0PreLegalizerCombiner";
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override;
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private:
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AArch64O0PreLegalizerCombinerImplRuleConfig RuleConfig;
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};
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} // end anonymous namespace
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void AArch64O0PreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<TargetPassConfig>();
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AU.setPreservesCFG();
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getSelectionDAGFallbackAnalysisUsage(AU);
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AU.addRequired<GISelKnownBitsAnalysis>();
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AU.addPreserved<GISelKnownBitsAnalysis>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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AArch64O0PreLegalizerCombiner::AArch64O0PreLegalizerCombiner()
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: MachineFunctionPass(ID) {
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initializeAArch64O0PreLegalizerCombinerPass(*PassRegistry::getPassRegistry());
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if (!RuleConfig.parseCommandLineOption())
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report_fatal_error("Invalid rule identifier");
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}
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bool AArch64O0PreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
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if (MF.getProperties().hasProperty(
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MachineFunctionProperties::Property::FailedISel))
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return false;
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auto &TPC = getAnalysis<TargetPassConfig>();
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const Function &F = MF.getFunction();
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GISelKnownBits *KB = &getAnalysis<GISelKnownBitsAnalysis>().get(MF);
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const AArch64Subtarget &ST = MF.getSubtarget<AArch64Subtarget>();
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CombinerInfo CInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false,
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/*LegalizerInfo*/ nullptr, /*EnableOpt*/ false,
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F.hasOptSize(), F.hasMinSize());
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// Disable fixed-point iteration in the Combiner. This improves compile-time
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// at the cost of possibly missing optimizations. See PR#94291 for details.
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CInfo.MaxIterations = 1;
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AArch64O0PreLegalizerCombinerImpl Impl(MF, CInfo, &TPC, *KB,
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/*CSEInfo*/ nullptr, RuleConfig, ST);
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return Impl.combineMachineInstrs();
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}
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char AArch64O0PreLegalizerCombiner::ID = 0;
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INITIALIZE_PASS_BEGIN(AArch64O0PreLegalizerCombiner, DEBUG_TYPE,
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"Combine AArch64 machine instrs before legalization",
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false, false)
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INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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INITIALIZE_PASS_DEPENDENCY(GISelKnownBitsAnalysis)
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INITIALIZE_PASS_DEPENDENCY(GISelCSEAnalysisWrapperPass)
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INITIALIZE_PASS_END(AArch64O0PreLegalizerCombiner, DEBUG_TYPE,
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"Combine AArch64 machine instrs before legalization", false,
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false)
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namespace llvm {
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FunctionPass *createAArch64O0PreLegalizerCombiner() {
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return new AArch64O0PreLegalizerCombiner();
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}
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} // end namespace llvm
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