b146a57f67
This patch adds support for the atomic_abi attribute, specifid in https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb128version. This was previously reverted due to ld.bfd segfaulting w/ unknown riscv attributes. Attribute emission is now guarded by a backend flag `--riscv-abi-attributes`, which is off by default. Linker support in LLD for attribute merging is now in a standalone patch. Reviewers: kito-cheng, MaskRay, asb Reviewed By: MaskRay Pull Request: https://github.com/llvm/llvm-project/pull/90266
30 lines
851 B
ArmAsm
30 lines
851 B
ArmAsm
## Test llvm-mc could handle .attribute correctly.
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# RUN: llvm-mc %s -triple=riscv32 -filetype=asm | FileCheck %s
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# RUN: llvm-mc %s -triple=riscv64 -filetype=asm | FileCheck %s
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# RUN: llvm-mc %s -triple=riscv32 -filetype=asm -riscv-add-build-attributes \
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# RUN: | FileCheck %s
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# RUN: llvm-mc %s -triple=riscv64 -filetype=asm -riscv-add-build-attributes \
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# RUN: | FileCheck %s
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.attribute stack_align, 16
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# CHECK: attribute 4, 16
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.attribute arch, "rv32i2p1_m2p0_a2p1_c2p0_zmmul1p0"
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# CHECK: attribute 5, "rv32i2p1_m2p0_a2p1_c2p0_zmmul1p0"
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.attribute unaligned_access, 0
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# CHECK: attribute 6, 0
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.attribute priv_spec, 2
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# CHECK: attribute 8, 2
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.attribute priv_spec_minor, 0
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# CHECK: attribute 10, 0
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.attribute priv_spec_revision, 0
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# CHECK: attribute 12, 0
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.attribute atomic_abi, 0
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# CHECK: attribute 14, 0
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