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llvm-project/llvm/test/TableGen
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Mahesh-Attarde e61a7dc256
[X86][AVX512] Use comx for compare (#113567) 
We added AVX10.2 COMEF ISA in LLVM, This does not optimize correctly in
scenario mentioned below.
Summary
Input 
```
define i1 @oeq(float %x, float %y) {
    %1 = fcmp oeq float %x, %y
    ret i1 %1
}define i1 @une(float %x, float %y) {
    %1 = fcmp une float %x, %y
    ret i1 %1
}define i1 @ogt(float %x, float %y) {
    %1 = fcmp ogt float %x, %y
    ret i1 %1
}
// Prior AVX10.2, default code generation

oeq:                                    # @oeq
        cmpeqss xmm0, xmm1
        movd    eax, xmm0
        and     eax, 1
        ret
une:                                    # @une
        cmpneqss        xmm0, xmm1
        movd    eax, xmm0
        and     eax, 1
        ret
ogt:                                    # @ogt
        ucomiss xmm0, xmm1
        seta    al
        ret 
```

This patch will remove `cmpeqss` and `cmpneqss`. For complete transform
check unit test.

Continuing on what PR https://github.com/llvm/llvm-project/pull/113098
added

Earlier Legalization and combine expanded `setcc oeq:ch` node into `and`
and `setcc eq` , `setcc o`. From suggestions in community
new internal transform
```
Optimized type-legalized selection DAG: %bb.0 'hoeq:'
SelectionDAG has 11 nodes:
  t0: ch,glue = EntryToken
      t2: f16,ch = CopyFromReg t0, Register:f16 %0
      t4: f16,ch = CopyFromReg t0, Register:f16 %1
    t14: i8 = setcc t2, t4, setoeq:ch
  t10: ch,glue = CopyToReg t0, Register:i8 $al, t14
  t11: ch = X86ISD::RET_GLUE t10, TargetConstant:i32<0>, Register:i8 $al, t10:1

Optimized legalized selection DAG: %bb.0 'hoeq:'
SelectionDAG has 12 nodes:
  t0: ch,glue = EntryToken
        t2: f16,ch = CopyFromReg t0, Register:f16 %0
        t4: f16,ch = CopyFromReg t0, Register:f16 %1
      t15: i32 = X86ISD::UCOMX t2, t4
    t17: i8 = X86ISD::SETCC TargetConstant:i8<4>, t15
  t10: ch,glue = CopyToReg t0, Register:i8 $al, t17
  t11: ch = X86ISD::RET_GLUE t10, TargetConstant:i32<0>, Register:i8 $al, t10:1
```
Earlier transform is mentioned here
https://github.com/llvm/llvm-project/pull/113098#discussion_r1810307663

---------

Co-authored-by: mattarde <mattarde@intel.com>
2024-10-30 16:17:25 +08:00
..
Common
…
FixedLenDecoderEmitter
[TableGen] More named sub-operands work.
2022-12-07 14:37:08 -05:00
GlobalISelCombinerEmitter
Make a tablegen test match-table.td more robust.
2024-10-08 13:16:06 +01:00
64-bit-int.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
2003-08-03-PassCode.td
…
2006-09-18-LargeInt.td
…
2010-03-24-PrematureDefaults.td
…
AcquireAtCycle.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
address-space-patfrags.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
AliasAsmString.td
…
AllowDuplicateRegisterNames.td
[MC][AsmParser] Make MatchRegisterName return MCRegister (NFC) (#81408)
2024-02-18 13:59:49 +03:00
ambiguous-composition.td
…
AnonDefinitionOnDemand.td
…
anonymous-location.td
[LIT] Rename substitution %basename_s to %{s:basename} (#111062)
2024-10-03 18:18:10 -07:00
arithmetic.td
…
AsmPredicateCombining.td
[AArch64] Add target feature "all"
2022-06-30 10:37:58 -07:00
AsmPredicateCombiningRISCV.td
[RISCV] Remove MCRegisterInfo dependency from compressInst/uncompresInst/isCompressibleInst.
2023-01-17 11:56:43 -08:00
AsmPredicateCondsEmission.td
…
AsmVariant.td
…
AsmWriterPCRelOp.td
…
assert.td
[TableGen] Print assert message inline with assert failure (#111184)
2024-10-04 13:21:50 -07:00
bare-minimum-psets.td
[TableGen] const char *const x => const char x[]
2022-06-10 19:13:59 -07:00
BigEncoder.td
…
BitOffsetDecoder.td
…
BitsInit.td
…
BitsInitOverflow.td
…
cast-list-initializer.td
…
cast-multiclass.td
…
cast-string.td
…
cast-typeerror.td
…
cast.td
…
check-duplicate-tuple-regs.td
[TableGen] Check for duplicate register tuple definitions. (#95725)
2024-06-25 16:42:29 -05:00
ClassInstanceValue.td
…
code.td
…
CodeGenSchedule-duplicate-instrw.td
…
compare.td
…
CompressWriteLatencyEntry.td
[llvm-tblgen] CodeGenSchedModels::hasReadOfWrite gets wrong predication result
2022-09-19 14:22:43 +08:00
ConcatenatedSubregs.td
[Target][RISCV] Add HwMode support to subregister index size/offset. (#86368)
2024-03-27 12:19:28 -07:00
cond-bitlist.td
…
cond-default.td
…
cond-empty-list-arg.td
…
cond-inheritance.td
…
cond-let.td
…
cond-list.td
…
cond-subclass.td
…
cond-type.td
…
cond-usage.td
…
condsbit.td
…
ConstraintChecking1.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking2.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking3.td
[TableGen] Fix operand constraint checking problem. (#85859)
2024-03-20 13:32:38 -05:00
ConstraintChecking4.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking5.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking6.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking7.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking8.td
[TableGen] Fix operand constraint checking problem. (#85859)
2024-03-20 13:32:38 -05:00
ConstraintChecking.inc
…
ContextlessPredicates.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
CStyleComment.td
…
dag-functional.td
…
dag-isel-complexpattern.td
[SelectionDAG] Add space-optimized forms of OPC_CheckComplexPat (#73310)
2024-01-11 15:28:12 +08:00
dag-isel-regclass-emit-enum.td
[MVT][TableGen] Extend Machine Value Type to uint16_t (#99657)
2024-08-01 01:19:14 +08:00
dag-isel-res-order.td
[SelectionDAG] Add space-optimized forms of OPC_EmitNode/OPC_MorphNodeTo (#73502)
2023-12-12 17:45:32 +08:00
dag-isel-subregs.td
[SelectionDAG] Add instantiated OPC_EmitInteger and OPC_EmitStringInteger (#73241)
2023-11-27 11:08:28 +08:00
Dag.td
…
DAGDefaultOps.td
[SelectionDAG] Add space-optimized forms of OPC_EmitNode/OPC_MorphNodeTo (#73502)
2023-12-12 17:45:32 +08:00
def-multiple-operands.td
[TableGen][InstrInfoEmitter] Count sub-operands on def operands
2024-04-16 20:34:20 -04:00
DefaultOpsGlobalISel.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
defmclass.td
…
DefmInherit.td
…
DefmInsideMultiClass.td
…
defset-typeerror.td
…
defset.td
…
deftype.td
[TableGen] Support type aliases via new keyword deftype
2024-02-02 17:41:47 +08:00
defvar.td
[TableGen] Unify the priority of variables
2023-05-24 12:44:14 +08:00
detailed-records.td
…
directive1.td
[TableGen] Add explicit symbol visibility macros to code generated (#107873)
2024-09-19 12:42:46 -07:00
directive2.td
[TableGen] Add explicit symbol visibility macros to code generated (#107873)
2024-09-19 12:42:46 -07:00
directive3.td
…
dump.td
[TableGen] Resolve References at top level (#104578)
2024-08-19 21:05:39 +05:30
duplicate-include.inc
…
duplicate-include.td
…
DuplicateFieldValues.td
…
empty-psets.td
…
empty.td
…
eq-unset.td
…
eq.td
…
eqbit.td
…
exists-error-non-string.td
[TableGen] Add new operator !exists
2022-06-23 11:11:47 +08:00
exists-error-record.td
[TableGen] Add new operator !exists
2022-06-23 11:11:47 +08:00
exists-error-uninitialized.td
[TableGen] Add new operator !exists
2022-06-23 11:11:47 +08:00
exists.td
[RISCV][llvm-tblgen] Support conditional definitions using !exists clauses
2023-03-03 11:29:47 -08:00
FastISelEmitter.td
…
field-access-initializers.td
…
FieldAccess.td
…
filter.td
…
find.td
…
foldl.td
…
foreach-eval.td
…
foreach-leak.td
…
foreach-multiclass.td
…
foreach-range-parse-errors0.td
…
foreach-range-parse-errors1.td
…
foreach-range-parse-errors2.td
…
foreach-range-parse-errors3.td
…
foreach-range-parse-errors4.td
…
foreach-range-parse-errors5.td
…
foreach-variable-range.td
…
foreach.td
…
ForeachList.td
…
ForeachLoop.td
…
ForwardRef.td
…
GeneralList.td
…
generic-tables-instruction.td
[TableGen] Extend direct lookup to instruction values in generic tables. (#80486)
2024-02-07 12:49:39 +08:00
generic-tables-return-range.td
[TableGen] Add support for emitting new function definition to return a range of results for Primary Key (#96174)
2024-07-11 10:54:31 -07:00
generic-tables.td
[TableGen] Fix wrong bits output in GenericTable (#66867)
2023-09-25 19:32:59 +08:00
GenTags.td
[TableGen] Add a location for a class definition that was forward-declared
2022-07-20 15:56:17 +02:00
get-operand-type-no-expand.td
[TableGen] Add a knob for MCOperandInfo expansion in gen-instr-info
2022-06-29 00:59:16 -07:00
get-operand-type.td
[TableGen] Emit static const globals in getOperandType
2023-02-22 03:56:55 -05:00
getsetop.td
[TableGen] Support non-def operators in !getdagop (#77531)
2024-01-10 06:59:38 -08:00
gisel-physreg-input.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitter-atomic_store.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitter-frameindex.td
[TableGen][GISel] Handle frameindex/tframeindex (#90475)
2024-04-29 12:06:26 -04:00
GlobalISelEmitter-immAllZeroOne.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitter-immarg-literal-pattern.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitter-implicit-defs.td
[llvm][TableGen] Count implicit defs as well as explicit ones in the GlobalISel TableGen emitter (#112673)
2024-10-18 10:50:44 +01:00
GlobalISelEmitter-input-discard.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitter-multiple-output-discard.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitter-multiple-output.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitter-nested-subregs.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitter-notype-output-pattern.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitter-output-discard.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitter-PR39045.td
[GlobalISel] Change MatchTable entries to 1 byte each (#74429)
2023-12-13 08:48:56 +01:00
GlobalISelEmitter-SDNodeXForm-timm.td
[GlobalISel] Change MatchTable entries to 1 byte each (#74429)
2023-12-13 08:48:56 +01:00
GlobalISelEmitter-setcc.td
[GlobalISel] Change MatchTable entries to 1 byte each (#74429)
2023-12-13 08:48:56 +01:00
GlobalISelEmitter-zero-instr.td
…
GlobalISelEmitter-zero-reg.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitter.td
[GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (#96297)
2024-09-16 10:33:59 +01:00
GlobalISelEmitterCustomPredicate.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitterFlags.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitterHwModes.td
[GlobalISel] Refactor Combiner MatchData & Apply C++ Code Handling (#92239)
2024-05-16 13:39:00 +02:00
GlobalISelEmitterMatchTableOptimizer.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitterMatchTableOptimizerSameOperand-invalid.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitterMatchTableOptimizerSameOperand.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitterOverloadedPtr.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitterRegSequence.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitterSkippedPatterns.td
[TableGen] ShouldIgnore Pattern bit to disable DAG pattern imports during GISel (#88382)
2024-04-25 16:42:48 -04:00
GlobalISelEmitterSubreg.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
GlobalISelEmitterVariadic.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
HasNoUse.td
DAG: Replace bitwidth with type in suffix in atomic tablegen ops (#94845)
2024-06-13 11:52:22 +02:00
HwModeBitSet.td
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
2024-05-04 20:08:26 -05:00
HwModeEncodeAPInt.td
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
2024-05-04 20:08:26 -05:00
HwModeEncodeDecode2.td
[TableGen] Introduce a less aggressive suppression for HwMode Decoder… (#86060)
2024-04-01 17:19:46 +08:00
HwModeEncodeDecode3.td
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
2024-05-04 20:08:26 -05:00
HwModeEncodeDecode.td
[TableGen] Fixes for per-HwMode decoding problem (#82201)
2024-02-19 13:14:22 +08:00
HwModeSelect.td
[TableGen][RISCV][Hexagon][LoongArch] Add a list of Predicates to HwMode.
2023-03-14 13:00:38 -07:00
HwModeSubRegs.td
[Target][RISCV] Add HwMode support to subregister index size/offset. (#86368)
2024-03-27 12:19:28 -07:00
if-empty-list-arg.td
…
if-type.td
…
if-unresolved-cast.td
[llvm-tblgen] Support conditional definitions using !casts clauses
2023-03-10 15:50:11 -08:00
if.td
…
ifbit.td
…
ifstmt.td
…
immarg-predicated.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
immarg.td
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
2024-04-24 09:19:18 +02:00
Include.inc
…
Include.td
…
inhibit-pset.td
[TableGen] const char *const x => const char x[]
2022-06-10 19:13:59 -07:00
IntBitInit.td
…
interleave.td
…
intrinsic-attrs.td
[LLVM][TableGen] Decrease code size of Intrinsic::getAttributes (#110573)
2024-10-01 09:08:47 -07:00
intrinsic-duplicate-name.td
[LLVM][TableGen] Add error check for duplicate intrinsic names (#109226)
2024-09-19 05:21:00 -07:00
intrinsic-long-name.td
[TableGen] Refactor Intrinsics record (#106986)
2024-09-04 15:04:10 -07:00
intrinsic-overload-conflict.td
[LLVM][TableGen] Check overloaded intrinsic mangling suffix conflicts (#110324)
2024-10-15 08:15:57 -07:00
intrinsic-prefix-error.td
[TableGen] Add PrintError family overload that take a print function (#107333)
2024-09-07 05:13:54 -07:00
intrinsic-struct.td
[TableGen] Add check for number of intrinsic return values (#107326)
2024-09-05 14:52:30 -07:00
intrinsic-target-prefix-for-target-independent.td
[LLVM][TableGen] Check name conflicts between target dep and independent intrinsics (#109826)
2024-09-25 12:01:17 -07:00
intrinsic-varargs.td
llvm/test/TableGen/intrinsic-*.td: Use Intrinsics.td instead of mock
2023-03-20 06:48:14 +09:00
IntSpecialValues.td
…
invalid-macro-name-command-line.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
invalid-type-cast-patfrags.td
[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)
2024-10-01 11:17:00 +04:00
InvalidMCSchedClassDesc.td
…
isa.td
…
JSON-check.py
[NFC][Py Reformat] Reformat python files in llvm
2023-05-17 10:48:52 +02:00
JSON-locs.td
[TableGen] Include source location in JSON dump (#79028)
2024-01-24 17:07:20 +00:00
JSON.td
[TableGen] Include source location in JSON dump (#79028)
2024-01-24 17:07:20 +00:00
LazyChange.td
…
LetInsideMultiClasses.td
…
lisp.td
…
list-element-bitref.td
…
ListArgs.td
…
ListArgsSimple.td
…
listconcat.td
…
ListConversion.td
…
listflatten-error.td
[NFC] Fix line endings for OptionStrCmp.h and .td test files (#109806)
2024-09-24 12:24:17 -07:00
listflatten.td
[NFC] Fix line endings for OptionStrCmp.h and .td test files (#109806)
2024-09-24 12:24:17 -07:00
ListManip.td
…
ListOfList.td
…
listpaste.td
…
listremove.td
[TableGen] Add a !listremove() bang operator
2022-12-09 15:03:18 +00:00
ListSlices-fail.td
TableGen: Let expressions available to list subscriptions and list slices
2023-04-26 23:47:16 +09:00
ListSlices.td
TableGen: Let expressions available to list subscriptions and list slices
2023-04-26 23:47:16 +09:00
listsplat.td
…
lit.local.cfg
[AIX] Use internal lit shell for TableGen instead of a global setting (#113627)
2024-10-25 13:06:02 -04:00
LoLoL.td
…
MacroFusion.td
[TableGen] Fix MacroFusion.td
2024-04-01 18:32:55 +08:00
math.td
[TableGen] Add log bang operator
2022-10-26 09:16:32 -07:00
MissingOperandField.td
[TableGen] Delete support for deprecated positional matching.
2023-03-07 15:04:09 -05:00
MixedCasedMnemonic.td
[TableGen] const char *const x => const char x[]
2022-06-10 19:13:59 -07:00
MnemonicAlias.td
…
MultiClass-def-fail.td
…
MultiClass-defm-fail.td
…
MultiClass-defm.td
…
MultiClass.td
…
MultiClassDefName.td
…
MultiClassInherit.td
…
MultiPat.td
…
multiple-type-casts-patfrags.td
[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)
2024-10-01 11:17:00 +04:00
name-resolution-consistency.td
…
named-arguments.td
[TableGen] Support named arguments
2023-07-20 16:03:17 +08:00
nested_ifdef2.inc
[TableGen] Fix incorrect handling of nested #ifndef directives
2023-09-07 12:42:22 -07:00
nested_ifdef_main.td
[TableGen] Fix incorrect handling of nested #ifndef directives
2023-09-07 12:42:22 -07:00
nested_ifdef.inc
[TableGen] Fix incorrect handling of nested #ifndef directives
2023-09-07 12:42:22 -07:00
nested-comment.td
…
NestedForeach.td
…
nul-char.td
…
paste-reserved.td
…
Paste.td
…
pr8330.td
…
predicate-patfags.td
[TableGen] HasOneUse builtin predicate on PatFrags (#91578)
2024-05-20 06:18:49 -08:00
prep-diag1.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag2.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag3.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag4.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag5.td
…
prep-diag6.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag7.td
…
prep-diag8.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag9.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag10.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag11-include.inc
…
prep-diag11.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag12-include.inc
…
prep-diag12.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag13.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag14.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef-diag-1.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef-diag-2.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef.td
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prep-region-include.inc
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prep-region-processing.td
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ProcessorUniqueNames.td
[TableGen] Rework error reporting for duplicate Feature/Processor (#102257)
2024-08-08 02:00:36 +03:00
pset-enum.td
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pseudo-inst-expansion.td
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range-lists.td
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range-op-fail.td
[TableGen] Enhance !range bang operator (#66489)
2023-09-27 12:07:36 +08:00
range-op.td
[TableGen] Enhance !range bang operator (#66489)
2023-09-27 12:07:36 +08:00
rc-weight-override.td
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ReadAdvanceInvalidWrite.td
[CodeGenSchedule] Don't allow invalid ReadAdvances to be formed (#82685)
2024-02-26 18:25:21 -08:00
RegBankFromRegClass.td
[GISel][TableGen] Generate getRegBankFromRegClass (#99896)
2024-07-25 09:41:55 -04:00
RegisterBankEmitter.td
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RegisterClass.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
RegisterEncoder.td
[TableGen] More named sub-operands work.
2022-12-07 14:37:08 -05:00
RegisterInfoEmitter-BaseClassOrder.td
[TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.
2023-07-27 10:42:21 +01:00
RegisterInfoEmitter-regcost-list.td
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RegisterInfoEmitter-regcost-tuple.td
TableGen: Let getAllDerivedDefinitions() numeric order.
2023-03-31 06:00:54 +09:00
RegisterInfoEmitter-regcost.td
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RegisterInfoEmitter-tsflags.td
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RelTest.td
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repr.td
[TableGen] New bang operator !repr. (#68716)
2023-10-11 13:11:48 +02:00
riscv-target-def.td
[RISCV] Add groupid/bitmask for RISC-V extension (#94440)
2024-07-22 14:18:05 +08:00
SchedModelError.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
searchabletables-intrinsic.td
[TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (#107339)
2024-09-07 15:11:34 -07:00
self-reference-recursion.td
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self-reference-typeerror.td
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self-reference.td
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SetTheory.td
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SiblingForeach.td
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simplify-patfrag.td
[TableGen] ShouldIgnore Pattern bit to disable DAG pattern imports during GISel (#88382)
2024-04-25 16:42:48 -04:00
size.td
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Slice.td
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spurious-semi.td
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strconcat.td
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string_ops.td
[TableGen] add !toupper and !tolower operators to change the casing of strings.
2023-03-07 12:41:56 +00:00
String.td
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subst2.td
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subst.td
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substr.td
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SubtargetFeatureUniqueNames.td
[TableGen] Rework error reporting for duplicate Feature/Processor (#102257)
2024-08-08 02:00:36 +03:00
SuperSubclassSameName.td
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TargetInstrInfo.td
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TargetInstrSpec.td
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template-arg-dependency.td
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template-args.td
[TableGen] Improve error report of unspecified arguments
2023-08-03 17:22:34 +08:00
TemplateArgRename.td
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Tree.td
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TreeNames.td
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true-false.td
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trydecode-emission2.td
[NFC][TableGen] Refine the check in Decoder
2023-02-09 16:14:38 +08:00
trydecode-emission3.td
[NFC][TableGen] Refine the check in Decoder
2023-02-09 16:14:38 +08:00
trydecode-emission4.td
[TableGen] Extend OPC_ExtractField/OPC_CheckField start value widths. (#79723)
2024-01-29 09:22:22 -05:00
trydecode-emission.td
[NFC][TableGen] Refine the check in Decoder
2023-02-09 16:14:38 +08:00
TwoLevelName.td
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UnsetBitInit.td
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unsetop.td
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unterminated-c-comment-include.inc
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unterminated-c-comment.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
unterminated-code-block-include.inc
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unterminated-code-block.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
UnterminatedComment.td
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usevalname.td
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ValidIdentifiers.td
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VarLenDecoder.td
[NFC][TableGen] Refine the check in Decoder
2023-02-09 16:14:38 +08:00
VarLenEncoder.td
Let M68kMCCodeEmitter set Scratch size. (#69898)
2023-10-26 14:43:38 +02:00
VarLenEncoderHwModes.td
[Tablegen] Bugfix and refactor VarLenCodeEmitter HwModes. (#68795)
2023-10-20 07:21:24 +02:00
warn-unused-template-arg.td
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x86-fold-tables.inc
[X86][AVX512] Use comx for compare (#113567)
2024-10-30 16:17:25 +08:00
x86-fold-tables.td
[TableGen] Handle Windows line endings in x86-fold-tables.td test (#112997)
2024-10-21 09:58:59 -07:00