Danial Klimkin 9671ed1afc
Revert "LSV: forbid load-cycles when vectorizing; fix bug (#104815)" (#106245)
This reverts commit c46b41aaa6eaa787f808738d14c61a2f8b6d839f.

Multiple tests time out, either due to performance hit (see comment) or
a cycle.
2024-08-27 18:45:22 +02:00

16 lines
537 B
LLVM

; REQUIRES: asserts
; RUN: not --crash opt -mtriple=aarch64 -passes=load-store-vectorizer \
; RUN: -disable-output %s 2>&1 | FileCheck %s
define i32 @load_cycle(ptr %x) {
; CHECK: Unexpected cycle while re-ordering instructions
entry:
%gep.x.1 = getelementptr inbounds [2 x i32], ptr %x, i32 0, i32 1
%load.x.1 = load i32, ptr %gep.x.1
%rem = urem i32 %load.x.1, 1
%gep.x.2 = getelementptr inbounds [2 x i32], ptr %x, i32 %rem, i32 0
%load.x.2 = load i32, ptr %gep.x.2
%ret = add i32 %load.x.2, %load.x.1
ret i32 %ret
}