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llvm-project/llvm/test/CodeGen/AMDGPU
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Nicolai Haehnle 7b0e25b7ad AMDGPU: Fix SILoadStoreOptimizer when writes cannot be merged due register dependencies 
Summary:
When finding a match for a merge and collecting the instructions that must
be moved, keep in mind that the instruction we merge might actually use one
of the defs that are being moved.

Fixes piglit spec/arb_enhanced_layouts/execution/component-layout/vs-tcs-load-output[-indirect].

The fact that the ds_read in the test case is not eliminated suggests that
there might be another problem related to alias analysis, but that's a
separate problem: this pass should still work correctly even when earlier
optimization passes missed something or were disabled.

Reviewers: tstellarAMD, arsenm

Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D25829

llvm-svn: 285273
2016-10-27 08:15:07 +00:00
..
GlobalISel
GlobalISel: move type information to MachineRegisterInfo.
2016-09-09 11:46:34 +00:00
32-bit-local-address-space.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
add_i64.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
add_i128.ll
AMDGPU: Select 64-bit {ADD,SUB}{C,E} nodes
2016-10-14 10:30:00 +00:00
add-debug.ll
…
add.ll
AMDGPU: Improve load/store of illegal types.
2016-07-01 22:47:50 +00:00
addrspacecast-constantexpr.ll
AMDGPU: Fix constantexpr addrspacecasts
2016-06-06 20:03:31 +00:00
addrspacecast.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
amdgcn.bitcast.ll
AMDGPU/R600: EXTRACT_VECT_ELT should only bypass BUILD_VECTOR if the vectors have the same number of elements.
2016-09-02 20:13:19 +00:00
amdgcn.private-memory.ll
AMDGPU: Define priorities for register classes
2016-05-21 03:55:07 +00:00
amdgpu-codegenprepare-fdiv.ll
[AMDGPU] Promote uniform i16 ops to i32 ops for targets that have 16 bit instructions
2016-09-28 20:05:39 +00:00
amdgpu-codegenprepare-i16-to-i32.ll
[AMDGPU] Promote uniform (i1, i16] operations to i32
2016-10-07 14:22:58 +00:00
amdgpu-shader-calling-convention.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
amdgpu.private-memory.ll
Reapply "AMDGPU: Don't use offen if it is 0"
2016-10-26 15:08:16 +00:00
amdgpu.work-item-intrinsics.deprecated.ll
AMDGPU: Remove read_workdim intrinsic
2016-07-25 20:17:02 +00:00
and-gcn.ll
AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions
2016-02-12 23:45:29 +00:00
and.ll
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
annotate-kernel-features-hsa.ll
AMDGPU: Implement addrspacecast
2016-04-25 19:27:24 +00:00
annotate-kernel-features.ll
AMDGPU: Stop checking intrinsics not used by HSA for dispatch-ptr
2016-01-30 05:10:59 +00:00
anonymous-gv.ll
AMDGPU/SI: Don't crash on anonymous GlobalValues
2016-09-26 17:29:25 +00:00
anyext.ll
…
array-ptr-calc-i32.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
array-ptr-calc-i64.ll
AMDGPU: Remove llvm.SI.tid intrinsic
2016-06-17 21:18:41 +00:00
atomic_cmp_swap_local.ll
MachineScheduler: Fully compare top/bottom candidates
2016-06-25 00:23:00 +00:00
atomic_load_add.ll
…
atomic_load_sub.ll
AMDGPU: Run r600 tests last
2016-05-05 20:07:37 +00:00
attr-amdgpu-flat-work-group-size.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
attr-amdgpu-num-sgpr.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
attr-amdgpu-num-vgpr.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
attr-amdgpu-waves-per-eu.ll
[AMDGPU] Wave and register controls
2016-09-06 20:29:10 +00:00
attr-unparseable.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
basic-branch.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
basic-loop.ll
…
bfe_uint.ll
…
bfi_int.ll
…
bfm.ll
AMDGPU: Remove bfi and bfm intrinsics
2016-02-08 19:06:01 +00:00
big_alu.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
bitcast-vector-extract.ll
AMDGPU: Push bitcasts through build_vector
2016-09-17 15:44:16 +00:00
bitreverse-inline-immediates.ll
AMDGPU: Make i64 loads/stores promote to v2i32
2016-05-02 20:07:26 +00:00
bitreverse.ll
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
branch-condition-and.ll
AMDGPU: Fix use-after-free in SIOptimizeExecMasking
2016-10-07 08:40:14 +00:00
branch-relax-spill.ll
BranchRelaxation: Support expanding unconditional branches
2016-10-06 16:20:41 +00:00
branch-relaxation.ll
BranchRelaxation: Support expanding unconditional branches
2016-10-06 16:20:41 +00:00
branch-uniformity.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
bswap.ll
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
bug-vopc-commute.ll
AMDGPU: Guard VOPC instructions against incorrect commute
2016-04-19 21:58:22 +00:00
build_vector.ll
…
call_fs.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
call.ll
AMDGPU: Fix assert when erroring on a call
2016-05-18 16:10:11 +00:00
calling-conventions.ll
AMDGPU/SI: Remove calling convention assertion from LowerFormalArguments()
2015-10-06 21:16:34 +00:00
captured-frame-index.ll
Reapply "AMDGPU: Don't use offen if it is 0"
2016-10-26 15:08:16 +00:00
cayman-loop-bug.ll
AMDGPU: Fix a few slightly broken tests
2016-05-18 15:48:44 +00:00
cf_end.ll
…
cf-loop-on-constant.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
cf-stack-bug.ll
…
cgp-addressing-modes-flat.ll
AMDGPU/SI: Assembler: Unify parsing/printing of operands.
2016-04-29 09:02:30 +00:00
cgp-addressing-modes.ll
Reapply "AMDGPU: Don't use offen if it is 0"
2016-10-26 15:08:16 +00:00
cgp-bitfield-extract.ll
DAGCombiner: Reduce 64-bit BFE pattern to pattern on 32-bit component
2016-04-21 18:03:06 +00:00
ci-use-flat-for-global.ll
AMDGPU: Set flat_scratch from flat_scratch_init reg
2016-02-12 06:31:30 +00:00
cndmask-no-def-vcc.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
coalescer_distribute.ll
LiveInterval: Fix Distribute() failing on liveranges with unused VNInfos
2016-03-24 21:41:38 +00:00
coalescer_remat.ll
…
coalescer-subrange-crash.ll
Do not consider subreg defs as reads when computing subrange liveness
2016-09-02 19:48:55 +00:00
coalescer-subreg-join.mir
Do not consider subreg defs as reads when computing subrange liveness
2016-09-02 19:48:55 +00:00
codegen-prepare-addrmode-sext.ll
…
combine_vloads.ll
…
commute_modifiers.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
commute-compares.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
commute-shifts.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
complex-folding.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
concat_vectors.ll
…
constant-fold-mi-operands.ll
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
control-flow-fastregalloc.ll
AMDGPU: Assume spilling will occur at -O0
2016-10-13 13:10:00 +00:00
convergent-inlineasm.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
copy-illegal-type.ll
AMDGPU: Improve load/store of illegal types.
2016-07-01 22:47:50 +00:00
copy-to-reg.ll
…
ctlz_zero_undef.ll
[AMDGPU] Promote uniform (i1, i16] operations to i32
2016-10-07 14:22:58 +00:00
ctlz.ll
[AMDGPU] Promote uniform (i1, i16] operations to i32
2016-10-07 14:22:58 +00:00
ctpop64.ll
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
ctpop.ll
AMDGPU/SI: Enable load-store-opt by default.
2016-05-26 19:35:29 +00:00
cttz_zero_undef.ll
…
cube.ll
AMDGPU: Add new amdgcn intrinsics for cube instructions
2016-01-26 04:29:56 +00:00
cvt_f32_ubyte.ll
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
2016-10-13 20:23:25 +00:00
cvt_flr_i32_f32.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
cvt_rpi_i32_f32.ll
…
dagcombine-reassociate-bug.ll
AMDGPU: Add volatile to test loads and stores
2016-04-12 13:38:18 +00:00
dagcombiner-bug-illegal-vec4-int-to-fp.ll
…
debug.ll
…
debugger-emit-prologue.ll
[AMDGPU] Emit debugger prologue and emit the rest of the debugger fields in the kernel code header
2016-06-25 03:11:28 +00:00
debugger-insert-nops.ll
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
2016-10-13 20:23:25 +00:00
debugger-reserve-regs.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
default-fp-mode.ll
AMDGPU : Add a function to enable and disable IEEEBit for SC and shader
2016-10-19 22:34:49 +00:00
detect-dead-lanes.mir
MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.
2016-08-24 01:32:41 +00:00
disconnected-predset-break-bug.ll
…
drop-mem-operand-move-smrd.ll
AMDGPU/SI: Enable load-store-opt by default.
2016-05-26 19:35:29 +00:00
ds_read2_offset_order.ll
AMDGPU: Run LoadStoreVectorizer pass by default
2016-09-09 22:29:28 +00:00
ds_read2_superreg.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
ds_read2.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
ds_read2st64.ll
AMDGPU/SI: Canonicalize offset order for merged DS instructions
2016-08-26 21:36:47 +00:00
ds_write2.ll
AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler
2016-08-29 19:15:22 +00:00
ds_write2st64.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
ds-negative-offset-addressing-mode-loop.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
ds-sub-offset.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
dynamic_stackalloc.ll
[AMDGPU] Remove exit-on-error in test (PR27761)
2016-06-23 09:19:16 +00:00
elf.ll
AMDGPU/SI: Increase SGPR limit to 96 on Tonga/Iceland
2016-08-05 21:23:29 +00:00
elf.r600.ll
…
else.ll
AMDGPU: Split SILowerControlFlow into two pieces
2016-08-22 19:33:16 +00:00
empty-function.ll
…
endcf-loop-header.ll
AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions
2016-02-12 23:45:29 +00:00
extload-align.ll
[DAG] Fix incorrect alignment of ext load.
2016-09-22 17:28:43 +00:00
extload-private.ll
Reapply "AMDGPU: Don't use offen if it is 0"
2016-10-26 15:08:16 +00:00
extload.ll
AMDGPU: Cleanup load tests
2016-06-02 19:54:26 +00:00
extract_vector_elt-f64.ll
AMDGPU: Cleanup vector insert/extract tests
2016-05-28 00:51:06 +00:00
extract_vector_elt-i8.ll
AMDGPU: Cleanup vector insert/extract tests
2016-05-28 00:51:06 +00:00
extract_vector_elt-i16.ll
AMDGPU: Cleanup vector insert/extract tests
2016-05-28 00:51:06 +00:00
extract_vector_elt-i64.ll
AMDGPU: Cleanup vector insert/extract tests
2016-05-28 00:51:06 +00:00
extract-vector-elt-build-vector-combine.ll
AMDGPU: Un-xfail and add tests
2016-06-24 06:58:01 +00:00
extractelt-to-trunc.ll
DAGCombiner: Don't narrow volatile vector loads + extract
2016-06-27 19:31:04 +00:00
fabs.f64.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
fabs.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
fadd64.ll
AMDGPU: Make v2i64/v2f64 legal types.
2015-11-25 19:58:34 +00:00
fadd.ll
AMDGPU: Run r600 tests last
2016-05-05 20:07:37 +00:00
fcanonicalize.ll
AMDGPU: Simplify tests with per function subtargets
2016-07-09 07:55:03 +00:00
fceil64.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
fceil.ll
…
fcmp64.ll
…
fcmp-cnd.ll
…
fcmp-cnde-int-args.ll
…
fcmp.ll
Fix CHECK directives that weren't checking.
2015-08-31 21:10:35 +00:00
fconst64.ll
…
fcopysign.f32.ll
…
fcopysign.f64.ll
[AMDGPU] add fcopysign(f64, f32) pattern
2016-10-20 16:17:54 +00:00
fdiv.f64.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
fdiv.ll
AMDGPU: Change fdiv lowering based on !fpmath metadata
2016-07-19 23:16:53 +00:00
fetch-limits.r600.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
fetch-limits.r700+.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
ffloor.f64.ll
AMDGPU: Move cndmask pseudo to be isel pseudo
2016-08-27 01:00:37 +00:00
ffloor.ll
…
flat_atomics_i64.ll
AMDGPU: Fix flat atomics
2016-06-09 23:42:54 +00:00
flat_atomics.ll
AMDGPU: Fix flat atomics
2016-06-09 23:42:54 +00:00
flat-address-space.ll
AMDGPU/SI: Don't emit multi-dword flat memory ops when they might access scratch
2016-10-26 14:38:47 +00:00
flat-scratch-reg.ll
AMDGPU : Add XNACK feature to GPUs that support it.
2016-09-06 19:55:17 +00:00
floor.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
fma-combine.ll
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
fma.f64.ll
…
fma.ll
AMDGPU: Run SIFoldOperands after PeepholeOptimizer
2016-04-14 21:58:24 +00:00
fmad.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
fmax3.f64.ll
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
fmax3.ll
AMDGPU/SI: Enable load-store-opt by default.
2016-05-26 19:35:29 +00:00
fmax_legacy.f64.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
fmax_legacy.ll
AMDGPU: Add volatile to test loads and stores
2016-04-12 13:38:18 +00:00
fmax.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
fmaxnum.f64.ll
…
fmaxnum.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
fmed3.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
fmin3.ll
AMDGPU/SI: Enable load-store-opt by default.
2016-05-26 19:35:29 +00:00
fmin_legacy.f64.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
fmin_legacy.ll
AMDGPU: Add volatile to test loads and stores
2016-04-12 13:38:18 +00:00
fmin.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
fminnum.f64.ll
…
fminnum.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
fmul64.ll
…
fmul-2-combine-multi-use.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
fmul.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
fmuladd.ll
AMDGPU: Add volatile to test loads and stores
2016-04-12 13:38:18 +00:00
fnearbyint.ll
…
fneg-fabs.f64.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
fneg-fabs.ll
AMDGPU: Fix immediate folding logic when shrinking instructions
2016-09-09 23:32:53 +00:00
fneg.f64.ll
AMDGPU: Run SIFoldOperands after PeepholeOptimizer
2016-04-14 21:58:24 +00:00
fneg.ll
…
fp16_to_fp.ll
…
fp32_to_fp16.ll
…
fp_to_sint.f64.ll
AMDGPU: Fix i1 fp_to_int
2016-07-22 17:01:21 +00:00
fp_to_sint.ll
AMDGPU: Fix i1 fp_to_int
2016-07-22 17:01:21 +00:00
fp_to_uint.f64.ll
AMDGPU: Fix i1 fp_to_int
2016-07-22 17:01:21 +00:00
fp_to_uint.ll
AMDGPU: Fix i1 fp_to_int
2016-07-22 17:01:21 +00:00
fp-classify.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
fpext.ll
AMDGPU: Cleanup load tests
2016-06-02 19:54:26 +00:00
fptrunc.ll
…
fract.f64.ll
AMDGPU: Move cndmask pseudo to be isel pseudo
2016-08-27 01:00:37 +00:00
fract.ll
AMDGPU: Add fract intrinsic
2016-05-28 00:19:52 +00:00
frem.ll
AMDGPU/SI: Fix 32-bit fdiv lowering
2016-06-09 19:17:15 +00:00
fsqrt.f64.ll
AMDGPU: Merge / reorganize tests
2016-07-09 08:02:28 +00:00
fsqrt.ll
AMDGPU: Merge / reorganize tests
2016-07-09 08:02:28 +00:00
fsub64.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
fsub.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
ftrunc.f64.ll
AMDGPU: Define a schedule class for COPY.
2016-06-24 23:52:11 +00:00
ftrunc.ll
AMDGPU: Run r600 tests last
2016-05-05 20:07:37 +00:00
gep-address-space.ll
DAGCombiner: Combine extract_vector_elt from build_vector
2015-10-12 23:59:50 +00:00
global_atomics_i64.ll
AMDGPU: Fix i64 global cmpxchg
2016-06-09 23:42:48 +00:00
global_atomics.ll
AMDGPU: Fix missing and broken check lines in atomic tests
2016-06-09 23:42:44 +00:00
global-constant.ll
[AMDGPU] Emit constant address space data in .rodata section and use relocations instead of fixups (amdhsa only)
2016-10-20 18:12:38 +00:00
global-directive.ll
…
global-variable-relocs.ll
[AMDGPU] Emit 32-bit lo/hi got and pc relative variant kinds for external and global address space variables
2016-10-14 04:37:34 +00:00
gv-const-addrspace.ll
AMDGPU/R600: Fold global address operand
2016-05-13 20:39:31 +00:00
gv-offset-folding.ll
AMDGPU/SI: Make sure not to fold offsets into local address space globals
2016-06-25 01:59:16 +00:00
half.ll
AMDGPU: Fix immediate folding logic when shrinking instructions
2016-09-09 23:32:53 +00:00
hsa-default-device.ll
AMDGPU: Fix default device handling
2016-01-27 02:17:49 +00:00
hsa-fp-mode.ll
AMDGPU : Add a function to enable and disable IEEEBit for SC and shader
2016-10-19 22:34:49 +00:00
hsa-func.ll
AMDGPU/SI: Add support for R_AMDGPU_GOTPCREL
2016-07-13 14:23:33 +00:00
hsa-globals.ll
[AMDGPU] Emit constant address space data in .rodata section and use relocations instead of fixups (amdhsa only)
2016-10-20 18:12:38 +00:00
hsa-group-segment.ll
AMDGPU/SI: Don't emit group segment global variables
2015-12-02 17:00:42 +00:00
hsa-note-no-func.ll
AMDGPU: Refactor processor definition to use ISA version features
2016-10-26 16:37:56 +00:00
hsa.ll
[AMDGPU] Mark .note section SHF_ALLOC so lld creates a segment for it
2016-10-17 22:40:15 +00:00
i1-copy-implicit-def.ll
AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions
2016-02-12 23:45:29 +00:00
i1-copy-phi.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
i8-to-double-to-float.ll
…
icmp64.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
icmp-select-sete-reverse-args.ll
…
image-attributes.ll
ScheduleDAGInstrs: Rework schedule graph builder.
2015-12-04 01:51:19 +00:00
image-resource-id.ll
AMDGPU: Add pass to lower OpenCL image and sampler arguments.
2015-08-07 23:19:30 +00:00
imm.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
indirect-addressing-si-noopt.ll
Replace subregister uses when processing tied operands
2016-08-26 06:31:32 +00:00
indirect-addressing-si.ll
AMDGPU: Initial implementation of VGPR indexing mode
2016-10-12 18:49:05 +00:00
indirect-private-64.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
infinite-loop-evergreen.ll
llvm/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll REQUIRES +Asserts.
2016-09-12 04:27:28 +00:00
infinite-loop.ll
…
inline-asm.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
inline-calls.ll
AMDGPU/SI: Handle aliases in AMDGPUAlwaysInlinePass
2016-08-31 11:18:33 +00:00
inline-constraints.ll
AMDGPU: Relax SGPR asm constraint register class
2016-08-30 20:50:08 +00:00
input-mods.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
insert_subreg.ll
…
insert_vector_elt.ll
Reapply "AMDGPU: Don't use offen if it is 0"
2016-10-26 15:08:16 +00:00
invalid-addrspacecast.ll
AMDGPU: Implement addrspacecast
2016-04-25 19:27:24 +00:00
invalid-opencl-version-metadata1.ll
AMDGPU: Fix bug causing crash due to invalid opencl version metadata.
2016-07-20 14:38:06 +00:00
invalid-opencl-version-metadata2.ll
AMDGPU: Fix bug causing crash due to invalid opencl version metadata.
2016-07-20 14:38:06 +00:00
invalid-opencl-version-metadata3.ll
AMDGPU: Fix bug causing crash due to invalid opencl version metadata.
2016-07-20 14:38:06 +00:00
invariant-load-no-alias-store.ll
AMDGPU: Run LoadStoreVectorizer pass by default
2016-09-09 22:29:28 +00:00
jump-address.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
kcache-fold.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
kernarg-stack-alignment.ll
AMDGPU: Fix kernel argument alignment impacting stack size
2016-06-18 05:15:53 +00:00
kernel-args.ll
AMDGPU/SI: Fix kernel argument ABI for HSA
2016-09-16 22:20:24 +00:00
large-alloca-compute.ll
[AMDGPU] Assembler: rename amd_kernel_code_t asm names according to spec
2016-09-09 10:08:02 +00:00
large-alloca-graphics.ll
AMDGPU/SI: Set INDEX_STRIDE for scratch coalescing
2016-06-13 16:05:57 +00:00
large-constant-initializer.ll
…
large-work-group-promote-alloca.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
lds-alignment.ll
AMDGPU: Account for LDS alignment
2016-02-05 19:47:29 +00:00
lds-initializer.ll
Refactor backend diagnostics for unsupported features
2016-02-02 13:52:43 +00:00
lds-m0-init-in-loop.ll
AMDGPU: Handle cbranch vccz/vccnz
2016-05-21 00:29:40 +00:00
lds-oqap-crash.ll
…
lds-output-queue.ll
AMDGPU/R600: Replace barrier intrinsics
2016-07-18 18:34:59 +00:00
lds-size.ll
AMDGPU: Include LDS size in printed comment
2016-04-14 22:11:51 +00:00
lds-zero-initializer.ll
Refactor backend diagnostics for unsupported features
2016-02-02 13:52:43 +00:00
legalizedag-bug-expand-setcc.ll
…
lit.local.cfg
…
literals.ll
AMDGPU/R600: Delete/rename intrinsics no longer used by mesa
2016-07-14 05:47:17 +00:00
liveness.mir
MIRParser: Use dot instead of colon to mark subregisters
2016-07-26 21:49:34 +00:00
llvm.amdgcn.atomic.dec.ll
AMDGPU: Fix flat atomics
2016-06-09 23:42:54 +00:00
llvm.amdgcn.atomic.inc.ll
AMDGPU: Fix flat atomics
2016-06-09 23:42:54 +00:00
llvm.amdgcn.buffer.atomic.ll
AMDGPU: Fix MUBUF offset bugs affecting llvm.amdgcn.buffer.* intrinsics
2016-06-15 07:13:05 +00:00
llvm.amdgcn.buffer.load.format.ll
AMDGPU: Fix MUBUF offset bugs affecting llvm.amdgcn.buffer.* intrinsics
2016-06-15 07:13:05 +00:00
llvm.amdgcn.buffer.load.ll
AMDGPU: Fix MUBUF offset bugs affecting llvm.amdgcn.buffer.* intrinsics
2016-06-15 07:13:05 +00:00
llvm.amdgcn.buffer.store.format.ll
AMDGPU/SI: Assembler: Unify parsing/printing of operands.
2016-04-29 09:02:30 +00:00
llvm.amdgcn.buffer.store.ll
AMDGPU/SI: Assembler: Unify parsing/printing of operands.
2016-04-29 09:02:30 +00:00
llvm.amdgcn.buffer.wbinvl1.ll
AMDGPU: Add cache invalidation instructions.
2015-09-24 19:52:21 +00:00
llvm.amdgcn.buffer.wbinvl1.sc.ll
AMDGPU: Add cache invalidation instructions.
2015-09-24 19:52:21 +00:00
llvm.amdgcn.buffer.wbinvl1.vol.ll
AMDGPU: Add cache invalidation instructions.
2015-09-24 19:52:21 +00:00
llvm.amdgcn.class.ll
AMDGPU: Fold more custom nodes to undef
2016-06-20 18:33:56 +00:00
llvm.amdgcn.cos.ll
AMDGPU: Add intrinsics for sin/cos
2016-02-13 01:19:56 +00:00
llvm.amdgcn.cubeid.ll
AMDGPU: Add new amdgcn intrinsics for cube instructions
2016-01-26 04:29:56 +00:00
llvm.amdgcn.cubema.ll
AMDGPU: Add new amdgcn intrinsics for cube instructions
2016-01-26 04:29:56 +00:00
llvm.amdgcn.cubesc.ll
AMDGPU: Add new amdgcn intrinsics for cube instructions
2016-01-26 04:29:56 +00:00
llvm.amdgcn.cubetc.ll
AMDGPU: Add new amdgcn intrinsics for cube instructions
2016-01-26 04:29:56 +00:00
llvm.amdgcn.dispatch.id.ll
AMDGPU: Add HSA dispatch id intrinsic
2016-07-22 17:01:30 +00:00
llvm.amdgcn.dispatch.ptr.ll
Refactor backend diagnostics for unsupported features
2016-02-02 13:52:43 +00:00
llvm.amdgcn.div.fixup.ll
AMDGPU: Rename intrinsics to use amdgcn prefix
2016-01-22 21:30:34 +00:00
llvm.amdgcn.div.fmas.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
llvm.amdgcn.div.scale.ll
AMDGPU: Add volatile to test loads and stores
2016-04-12 13:38:18 +00:00
llvm.amdgcn.ds.bpermute.ll
AMDGPU/SI: Make sure to emit TargetConstant nodes when matching ds_*permute
2016-06-10 00:01:04 +00:00
llvm.amdgcn.ds.permute.ll
AMDGPU/SI: Add offset field to ds_permute/ds_bpermute instructions
2016-04-29 14:34:26 +00:00
llvm.amdgcn.ds.swizzle.ll
AMDGPU/SI: Define an intrinsic to expose ds_swizzle_b32
2016-06-22 21:33:49 +00:00
llvm.amdgcn.fcmp.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
llvm.amdgcn.fdiv.fast.ll
AMDGPU: Change fdiv lowering based on !fpmath metadata
2016-07-19 23:16:53 +00:00
llvm.amdgcn.fmul.legacy.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
llvm.amdgcn.fract.ll
AMDGPU: Fold more custom nodes to undef
2016-06-20 18:33:56 +00:00
llvm.amdgcn.frexp.exp.ll
AMDGPU: Add frexp_exp intrinsic
2016-03-30 22:28:52 +00:00
llvm.amdgcn.frexp.mant.ll
AMDGPU: Add frexp_mant intrinsic
2016-03-21 16:11:05 +00:00
llvm.amdgcn.groupstaticsize.ll
AMDGPU: Fix groupstaticsize for large LDS
2016-07-22 17:01:33 +00:00
llvm.amdgcn.icmp.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
llvm.amdgcn.image.atomic.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.amdgcn.image.gather4.ll
AMDGPU/SI: Implement amdgcn image intrinsics with sampler
2016-08-10 21:15:30 +00:00
llvm.amdgcn.image.getlod.ll
AMDGPU/SI: Implement amdgcn image intrinsics with sampler
2016-08-10 21:15:30 +00:00
llvm.amdgcn.image.ll
AMDGPU/SI: Change mimg intrinsic signatures
2016-10-12 16:35:29 +00:00
llvm.amdgcn.image.sample.ll
AMDGPU/SI: Implement amdgcn image intrinsics with sampler
2016-08-10 21:15:30 +00:00
llvm.amdgcn.image.sample.o.ll
AMDGPU/SI: Implement amdgcn image intrinsics with sampler
2016-08-10 21:15:30 +00:00
llvm.amdgcn.interp.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.amdgcn.kernarg.segment.ptr.ll
AMDGPU/SI: Include implicit arguments in kernarg_segment_byte_size
2016-09-23 01:33:26 +00:00
llvm.amdgcn.ldexp.ll
AMDGPU: Remove AMDGPU.ldexp
2016-07-15 21:26:56 +00:00
llvm.amdgcn.lerp.ll
AMDGPU: Add LLVM IR Intrinsic for v_lerp_u8
2016-07-12 18:02:14 +00:00
llvm.amdgcn.log.clamp.ll
AMDGPU: Add intrinsics for sin/cos
2016-02-13 01:19:56 +00:00
llvm.amdgcn.mbcnt.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.amdgcn.mov.dpp.ll
AMDGPU/SI: Use hazard recognizer to detect DPP hazards
2016-05-02 16:23:09 +00:00
llvm.amdgcn.mqsad.pk.u16.u8.ll
AMDGPU : Fix QSAD and MQSAD instructions' incorrect data type.
2016-08-18 19:51:14 +00:00
llvm.amdgcn.mqsad.u32.u8.ll
AMDGPU : Fix mqsad_u32_u8 instruction incorrect data type.
2016-09-09 19:31:51 +00:00
llvm.amdgcn.msad.u8.ll
AMDGPU : Fix SAD related instruction LIT tests function atttibute issues.
2016-08-11 17:14:17 +00:00
llvm.amdgcn.ps.live.ll
AMDGPU/SI: add llvm.amdgcn.ps.live intrinsic
2016-04-22 04:04:08 +00:00
llvm.amdgcn.qsad.pk.u16.u8.ll
AMDGPU : Fix QSAD and MQSAD instructions' incorrect data type.
2016-08-18 19:51:14 +00:00
llvm.amdgcn.queue.ptr.ll
AMDGPU: Add queue ptr intrinsic
2016-04-25 19:27:18 +00:00
llvm.amdgcn.rcp.legacy.ll
AMDGPU: Add fp legacy instruction intrinsics
2016-07-26 16:45:45 +00:00
llvm.amdgcn.rcp.ll
AMDGPU: Simplify tests with per function subtargets
2016-07-09 07:55:03 +00:00
llvm.amdgcn.readfirstlane.ll
AMDGCN/SI: Implement readlane/readfirstlane intrinsics
2016-08-24 20:35:23 +00:00
llvm.amdgcn.readlane.ll
AMDGCN/SI: Implement readlane/readfirstlane intrinsics
2016-08-24 20:35:23 +00:00
llvm.amdgcn.rsq.clamp.ll
AMDGPU: Fix immediate folding logic when shrinking instructions
2016-09-09 23:32:53 +00:00
llvm.amdgcn.rsq.legacy.ll
AMDGPU: Fold more custom nodes to undef
2016-06-20 18:33:56 +00:00
llvm.amdgcn.rsq.ll
AMDGPU: Fold more custom nodes to undef
2016-06-20 18:33:56 +00:00
llvm.amdgcn.s.barrier.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
llvm.amdgcn.s.dcache.inv.ll
AMDGPU: Implement AnalyzeBranch
2016-05-21 00:29:27 +00:00
llvm.amdgcn.s.dcache.inv.vol.ll
AMDGPU: Implement AnalyzeBranch
2016-05-21 00:29:27 +00:00
llvm.amdgcn.s.dcache.wb.ll
AMDGPU: Implement AnalyzeBranch
2016-05-21 00:29:27 +00:00
llvm.amdgcn.s.dcache.wb.vol.ll
AMDGPU: Implement AnalyzeBranch
2016-05-21 00:29:27 +00:00
llvm.amdgcn.s.decperflevel.ll
[AMDGPU] add s_incperflevel/s_decperflevel intrinsics.
2016-08-18 18:06:20 +00:00
llvm.amdgcn.s.getreg.ll
[AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware registers.
2016-04-27 15:17:03 +00:00
llvm.amdgcn.s.incperflevel.ll
[AMDGPU] add s_incperflevel/s_decperflevel intrinsics.
2016-08-18 18:06:20 +00:00
llvm.amdgcn.s.memrealtime.ll
AMDGPU: Implement readcyclecounter
2016-02-27 08:53:46 +00:00
llvm.amdgcn.s.memtime.ll
AMDGPU: Implement readcyclecounter
2016-02-27 08:53:46 +00:00
llvm.amdgcn.s.sleep.ll
AMDGPU: Add s_sleep intrinsic
2016-02-27 08:53:52 +00:00
llvm.amdgcn.s.waitcnt.ll
AMDGPU/SI: Change mimg intrinsic signatures
2016-10-12 16:35:29 +00:00
llvm.amdgcn.sad.hi.u8.ll
AMDGPU : Fix SAD related instruction LIT tests function atttibute issues.
2016-08-11 17:14:17 +00:00
llvm.amdgcn.sad.u8.ll
AMDGPU : Fix SAD related instruction LIT tests function atttibute issues.
2016-08-11 17:14:17 +00:00
llvm.amdgcn.sad.u16.ll
AMDGPU : Fix SAD related instruction LIT tests function atttibute issues.
2016-08-11 17:14:17 +00:00
llvm.amdgcn.sffbh.ll
AMDGPU: Add intrinsic for s_flbit_i32/v_ffbh_i32
2016-07-18 18:35:05 +00:00
llvm.amdgcn.sin.ll
AMDGPU: Add intrinsics for sin/cos
2016-02-13 01:19:56 +00:00
llvm.amdgcn.trig.preop.ll
AMDGPU: Rename intrinsics to use amdgcn prefix
2016-01-22 21:30:34 +00:00
llvm.amdgcn.workgroup.id.ll
AMDGPU/SI: Add support for triples with the mesa3d operating system
2016-09-16 21:34:26 +00:00
llvm.amdgcn.workitem.id.ll
AMDGPU/SI: Add support for triples with the mesa3d operating system
2016-09-16 21:34:26 +00:00
llvm.AMDGPU.bfe.i32.ll
AMDGPU: Add sdst operand to VOP2b instructions
2015-08-29 07:16:50 +00:00
llvm.AMDGPU.bfe.u32.ll
…
llvm.AMDGPU.clamp.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
llvm.AMDGPU.cube.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
llvm.AMDGPU.kill.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.amdgpu.kilp.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.cos.ll
AMDGPU: Run r600 tests last
2016-05-05 20:07:37 +00:00
llvm.dbg.value.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
llvm.exp2.ll
…
llvm.log2.ll
…
llvm.memcpy.ll
[AMDGPU] Emit constant address space data in .rodata section and use relocations instead of fixups (amdhsa only)
2016-10-20 18:12:38 +00:00
llvm.pow.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
llvm.r600.dot4.ll
AMDGPU/R600: Delete/rename intrinsics no longer used by mesa
2016-07-14 05:47:17 +00:00
llvm.r600.group.barrier.ll
AMDGPU/R600: Replace barrier intrinsics
2016-07-18 18:34:59 +00:00
llvm.r600.read.local.size.ll
ScheduleDAGInstrs: Rework schedule graph builder.
2015-12-04 01:51:19 +00:00
llvm.r600.recipsqrt.clamped.ll
AMDGPU: Remove legacy rsq.clamped intrinsic
2016-07-15 21:26:52 +00:00
llvm.r600.recipsqrt.ieee.ll
AMDGPU: Remove legacy rsq.clamped intrinsic
2016-07-15 21:26:52 +00:00
llvm.r600.tex.ll
AMDGPU/R600: Delete/rename intrinsics no longer used by mesa
2016-07-14 05:47:17 +00:00
llvm.rint.f64.ll
…
llvm.rint.ll
AMDGPU: Run r600 tests last
2016-05-05 20:07:37 +00:00
llvm.round.f64.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
llvm.round.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
llvm.SI.fs.interp.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.SI.gather4.ll
AMDGPU: Unify MOVRELSOffset and MOVRELDOffset
2016-07-12 08:12:16 +00:00
llvm.SI.getlod.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.SI.image.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.SI.image.sample-masked.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.SI.image.sample.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.SI.image.sample.o.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.SI.load.dword.ll
AMDGPU/SI: Assembler: Unify parsing/printing of operands.
2016-04-29 09:02:30 +00:00
llvm.SI.packf16.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.SI.sendmsg-m0.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
llvm.SI.sendmsg.ll
[AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.
2016-05-06 17:48:48 +00:00
llvm.SI.tbuffer.store.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
llvm.sin.ll
AMDGPU: Simplify tests with per function subtargets
2016-07-09 07:55:03 +00:00
load-constant-f64.ll
AMDGPU: Cleanup load tests
2016-06-02 19:54:26 +00:00
load-constant-i1.ll
AMDGPU: Cleanup load tests
2016-06-02 19:54:26 +00:00
load-constant-i8.ll
AMDGPU/R600: Enable Load combine
2016-08-27 19:09:43 +00:00
load-constant-i16.ll
[SelectionDAG] Add BUILD_VECTOR support to computeKnownBits and SimplifyDemandedBits
2016-09-08 12:57:51 +00:00
load-constant-i32.ll
AMDGPU/SI: Increase SGPR limit to 96 on Tonga/Iceland
2016-08-05 21:23:29 +00:00
load-constant-i64.ll
AMDGPU: Improve load/store of illegal types.
2016-07-01 22:47:50 +00:00
load-global-f32.ll
AMDGPU: Cleanup load tests
2016-06-02 19:54:26 +00:00
load-global-f64.ll
AMDGPU: Improve load/store of illegal types.
2016-07-01 22:47:50 +00:00
load-global-i1.ll
AMDGPU: Cleanup load tests
2016-06-02 19:54:26 +00:00
load-global-i8.ll
AMDGPU/R600: Enable Load combine
2016-08-27 19:09:43 +00:00
load-global-i16.ll
[SelectionDAG] Add BUILD_VECTOR support to computeKnownBits and SimplifyDemandedBits
2016-09-08 12:57:51 +00:00
load-global-i32.ll
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
load-global-i64.ll
AMDGPU: Improve load/store of illegal types.
2016-07-01 22:47:50 +00:00
load-input-fold.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
load-local-f32.ll
AMDGPU: Improve load/store of illegal types.
2016-07-01 22:47:50 +00:00
load-local-f64.ll
AMDGPU: Cleanup load tests
2016-06-02 19:54:26 +00:00
load-local-i1.ll
AMDGPU: Cleanup load tests
2016-06-02 19:54:26 +00:00
load-local-i8.ll
AMDGPU/R600: Enable Load combine
2016-08-27 19:09:43 +00:00
load-local-i16.ll
AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler
2016-08-29 19:15:22 +00:00
load-local-i32.ll
AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler
2016-08-29 19:15:22 +00:00
load-local-i64.ll
AMDGPU: Cleanup load tests
2016-06-02 19:54:26 +00:00
load-weird-sizes.ll
AMDGPU: Improve load/store of illegal types.
2016-07-01 22:47:50 +00:00
local-64.ll
AMDGPU/SI: Canonicalize offset order for merged DS instructions
2016-08-26 21:36:47 +00:00
local-atomics64.ll
AMDGPU/SI: Enable lanemask tracking in misched
2016-03-30 16:35:09 +00:00
local-atomics.ll
AMDGPU: Add atomic_inc + atomic_dec intrinsics
2016-04-12 14:05:04 +00:00
local-memory.amdgcn.ll
AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler
2016-08-29 19:15:22 +00:00
local-memory.ll
AMDGPU/R600: Replace barrier intrinsics
2016-07-18 18:34:59 +00:00
local-memory.r600.ll
AMDGPU/R600: Replace barrier intrinsics
2016-07-18 18:34:59 +00:00
local-stack-slot-bug.ll
Reapply "AMDGPU: Don't use offen if it is 0"
2016-10-26 15:08:16 +00:00
loop_break.ll
AMDGPU: Add missing test coverage for control flow breaks
2016-07-20 15:20:35 +00:00
loop-address.ll
…
loop-idiom.ll
…
lower-range-metadata-intrinsic-call.ll
[AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler
2016-02-12 17:57:54 +00:00
lshl.ll
…
lshr.ll
…
mad24-get-global-id.ll
AMDGPU: Un-xfail and add tests
2016-06-24 06:58:01 +00:00
mad_int24.ll
AMDGPU: Run r600 tests last
2016-05-05 20:07:37 +00:00
mad_uint24.ll
AMDGPU/SI: Use new SimplifyDemandedBits helper for multi-use operations
2016-10-14 19:14:29 +00:00
mad-combine.ll
AMDGPU/SI: Enable the post-ra scheduler
2016-04-30 00:23:06 +00:00
mad-sub.ll
AMDGPU: Add volatile to test loads and stores
2016-04-12 13:38:18 +00:00
madak.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
madmk.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
max3.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
max-literals.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
max.ll
SelectionDAG: Implement expansion of {S,U}MIN/MAX in integer legalization
2016-06-09 16:04:00 +00:00
mem-builtins.ll
AMDGPU: Fix crashes on memory functions
2016-08-11 17:31:42 +00:00
merge-store-crash.ll
LiveIntervalAnalysis: fix a crash in repairOldRegInRange
2016-08-10 18:51:14 +00:00
merge-store-usedef.ll
AMDGPU: Fix SILoadStoreOptimizer when writes cannot be merged due register dependencies
2016-10-27 08:15:07 +00:00
merge-stores.ll
AMDGPU/SI: Fix LowerParameter() for i16 arguments
2016-10-17 16:21:45 +00:00
min3.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
min.ll
AMDGPU: Run pointer optimization passes
2016-06-15 00:11:01 +00:00
missing-store.ll
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
move-addr64-rsrc-dead-subreg-writes.ll
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
move-to-valu-atomicrmw.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
movreld-bug.ll
AMDGPU: Fix Two Address problems with v_movreld
2016-10-24 14:56:02 +00:00
mubuf.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
mul_int24.ll
AMDGPU/SI: Fix crash caused by r284267
2016-10-21 20:25:11 +00:00
mul_uint24-amdgcn.ll
AMDGPU/SI: Use new SimplifyDemandedBits helper for multi-use operations
2016-10-14 19:14:29 +00:00
mul_uint24-r600.ll
[AMDGPU] Promote uniform i16 ops to i32 ops for targets that have 16 bit instructions
2016-09-28 20:05:39 +00:00
mul.ll
AMDGPU: Run r600 tests last
2016-05-05 20:07:37 +00:00
mulhu.ll
…
multilevel-break.ll
AMDGPU: Allow some control flow intrinsics to be CSEd
2016-09-16 22:11:18 +00:00
no-hsa-graphics-shaders.ll
[AMDGPU] Remove exit-on-error flag from test (PR27762)
2016-05-26 15:24:55 +00:00
no-initializer-constant-addrspace.ll
AMDGPU/R600: Fix GlobalValue regressions.
2016-06-25 18:24:16 +00:00
no-shrink-extloads.ll
AMDGPU: Un-xfail and add tests
2016-06-24 06:58:01 +00:00
opencl-image-metadata.ll
AMDGPU: Run r600 tests last
2016-05-05 20:07:37 +00:00
operand-folding.ll
AMDGPU: Don't fold subregister extracts into tied operands
2016-08-15 16:18:36 +00:00
operand-spacing.ll
…
or.ll
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
over-max-lds-size.ll
Generalize DiagnosticInfoStackSize to support other limits
2016-06-20 18:13:04 +00:00
packetizer.ll
…
parallelandifcollapse.ll
AMDGPU: Move subtarget feature checks into passes
2016-06-27 20:32:13 +00:00
parallelorifcollapse.ll
…
partially-dead-super-register-immediate.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
predicate-dp4.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
predicates.ll
AMDGPU: Remove disable-irstructurizer subtarget feature
2016-06-24 06:30:22 +00:00
private-access-no-objects.ll
AMDGPU: Assume spilling will occur at -O0
2016-10-13 13:10:00 +00:00
private-element-size.ll
Reapply "AMDGPU: Don't use offen if it is 0"
2016-10-26 15:08:16 +00:00
private-memory-atomics.ll
AMDGPU: Do not promote allocas with non-inbounds GEPs
2016-02-02 21:16:12 +00:00
private-memory-broken.ll
[AMDGPU] Remove exit-on-error in test (PR27761)
2016-06-23 09:19:16 +00:00
private-memory-r600.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
promote-alloca-array-allocation.ll
AMDGPU: Fix mishandling array allocations when promoting alloca
2016-04-28 18:38:48 +00:00
promote-alloca-bitcast-function.ll
[AMDGPU] Remove exit-on-error in test (PR27761)
2016-06-23 09:19:16 +00:00
promote-alloca-globals.ll
AMDGPU: Fix promote alloca pass creating huge arrays
2016-05-16 21:19:59 +00:00
promote-alloca-invariant-markers.ll
Revert "Revert "Invariant start/end intrinsics overloaded for address space""
2016-08-13 23:31:24 +00:00
promote-alloca-lifetime.ll
AMDGPU: Fix test not actually testing anything
2016-07-14 05:23:15 +00:00
promote-alloca-mem-intrinsics.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
promote-alloca-no-opts.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
promote-alloca-padding-size-estimate.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
promote-alloca-shaders.ll
AMDGPU: Disable AMDGPUPromoteAlloca pass for shader calling conventions.
2016-07-18 09:02:47 +00:00
promote-alloca-stored-pointer-value.ll
AMDGPU: Run LoadStoreVectorizer pass by default
2016-09-09 22:29:28 +00:00
promote-alloca-to-lds-icmp.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
promote-alloca-to-lds-phi.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
promote-alloca-to-lds-select.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
promote-alloca-unhandled-intrinsic.ll
AMDGPU: Fix test not actually testing anything
2016-07-14 05:23:15 +00:00
promote-alloca-volatile.ll
AMDGPU: Fix promote alloca for pointer loads
2016-05-18 23:20:24 +00:00
pv-packing.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
pv.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
r600-constant-array-fixup.ll
AMDGPU/R600: Fix fixups used for constant arrays
2016-08-29 19:01:48 +00:00
r600-encoding.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
r600-export-fix.ll
[DAG] Remove isVectorClearMaskLegal() check from vector_build dagcombine
2016-09-28 06:13:58 +00:00
r600-infinite-loop-bug-while-reorganizing-vector.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
r600.bitcast.ll
AMDGPU/R600: EXTRACT_VECT_ELT should only bypass BUILD_VECTOR if the vectors have the same number of elements.
2016-09-02 20:13:19 +00:00
r600.private-memory.ll
AMDGPU: Split private memory tests
2016-05-11 17:24:45 +00:00
r600.work-item-intrinsics.ll
AMDGPU: Remove read_workdim intrinsic
2016-07-25 20:17:02 +00:00
r600cfg.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
rcp-pattern.ll
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
read_register.ll
AMDGPU: Implement read_register and write_register intrinsics
2016-01-26 04:29:24 +00:00
read-register-invalid-subtarget.ll
AMDGPU: Implement read_register and write_register intrinsics
2016-01-26 04:29:24 +00:00
read-register-invalid-type-i32.ll
AMDGPU: Implement read_register and write_register intrinsics
2016-01-26 04:29:24 +00:00
read-register-invalid-type-i64.ll
AMDGPU: Implement read_register and write_register intrinsics
2016-01-26 04:29:24 +00:00
readcyclecounter.ll
AMDGPU: Implement readcyclecounter
2016-02-27 08:53:46 +00:00
README
…
reduce-load-width-alignment.ll
AMDGPU/SI: Assembler: Unify parsing/printing of operands.
2016-04-29 09:02:30 +00:00
reduce-store-width-alignment.ll
DAGCombiner: Relax alignment restriction when changing store type
2016-04-22 21:01:41 +00:00
reg-coalescer-sched-crash.ll
RegisterCoalescer: Remap subregister lanemasks before exchanging operands
2016-03-05 04:36:13 +00:00
register-count-comments.ll
AMDGPU: Remove llvm.SI.tid intrinsic
2016-06-17 21:18:41 +00:00
rename-disconnected-bug.ll
LiveIntervalAnalysis: Fix missing defs in renameDisconnectedComponents().
2016-05-20 19:46:13 +00:00
rename-independent-subregs.mir
RenameIndependentSubregs: Fix liveness query in rewriteOperands()
2016-08-03 22:37:47 +00:00
reorder-stores.ll
AMDGPU/SI: Enable load-store-opt by default.
2016-05-26 19:35:29 +00:00
ret_jump.ll
AMDGPU: Fix return of non-void-returning shaders
2016-07-06 08:35:17 +00:00
ret.ll
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
rotl.i64.ll
…
rotl.ll
AMDGPU: Run r600 tests last
2016-05-05 20:07:37 +00:00
rotr.i64.ll
…
rotr.ll
…
rsq.ll
AMDGPU: fdiv -1, x -> rcp -x
2016-08-02 22:25:04 +00:00
runtime-metadata.ll
AMDGPU: Add hidden kernel arguments to runtime metadata
2016-09-07 17:44:00 +00:00
rv7x0_count3.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
s_addk_i32.ll
AMDGPU: Try to commute when selecting s_addk_i32/s_mulk_i32
2016-09-08 17:35:41 +00:00
s_movk_i32.ll
AMDGPU: Fix immediate folding logic when shrinking instructions
2016-09-09 23:32:53 +00:00
s_mulk_i32.ll
AMDGPU: Try to commute when selecting s_addk_i32/s_mulk_i32
2016-09-08 17:35:41 +00:00
sad.ll
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
saddo.ll
…
salu-to-valu.ll
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
sampler-resource-id.ll
AMDGPU: Add pass to lower OpenCL image and sampler arguments.
2015-08-07 23:19:30 +00:00
scalar_to_vector.ll
AMDGPU: Improve load/store of illegal types.
2016-07-01 22:47:50 +00:00
schedule-fs-loop-nested-if.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
schedule-fs-loop-nested.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
schedule-fs-loop.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
schedule-global-loads.ll
AMDGPU: Run LoadStoreVectorizer pass by default
2016-09-09 22:29:28 +00:00
schedule-if-2.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
schedule-if.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
schedule-kernel-arg-loads.ll
AMDGPU: Define a schedule class for COPY.
2016-06-24 23:52:11 +00:00
schedule-vs-if-nested-loop-failure.ll
AMDGPU/R600: Replace barrier intrinsics
2016-07-18 18:34:59 +00:00
schedule-vs-if-nested-loop.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
scheduler-subrange-crash.ll
Do not consider subreg defs as reads when computing subrange liveness
2016-09-02 19:48:55 +00:00
scratch-buffer.ll
Reapply "AMDGPU: Don't use offen if it is 0"
2016-10-26 15:08:16 +00:00
sdiv.ll
AMDGPU/SI: Enable load-store-opt by default.
2016-05-26 19:35:29 +00:00
sdivrem24.ll
AMDGPU: Fix high bits after division optimization
2016-05-21 01:53:33 +00:00
sdivrem64.ll
AMDGPU: Fold bitcasts of scalar constants to vectors
2016-04-14 21:58:07 +00:00
select64.ll
AMDGPU/SI: Fold operands through REG_SEQUENCE instructions
2015-09-09 15:43:26 +00:00
select-i1.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
select-vectors.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
select.ll
…
selectcc-cnd.ll
…
selectcc-cnde-int.ll
…
selectcc-icmp-select-float.ll
…
selectcc-opt.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
selectcc.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
selected-stack-object.ll
llvm/test/CodeGen/AMDGPU/selected-stack-object.ll REQUIRES +Asserts, since it expects assertion failure.
2016-07-12 02:18:09 +00:00
set-dx10.ll
ScheduleDAGInstrs: Rework schedule graph builder.
2015-12-04 01:51:19 +00:00
setcc64.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
setcc-equivalent.ll
…
setcc-opt.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
setcc.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
seto.ll
…
setuo.ll
…
sext-eliminate.ll
…
sext-in-reg-failure-r600.ll
AMDGPU: Fix introducing stack access on unaligned v16i8
2016-08-31 21:52:27 +00:00
sext-in-reg.ll
AMDGPU: Expand unaligned accesses early
2016-07-01 22:55:55 +00:00
sgpr-control-flow.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
sgpr-copy-duplicate-operand.ll
…
sgpr-copy.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
shared-op-cycle.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
shift-and-i64-ubfe.ll
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
shift-and-i128-ubfe.ll
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
shift-i64-opts.ll
AMDGPU/SI: Enable load-store-opt by default.
2016-05-26 19:35:29 +00:00
shl_add_constant.ll
AMDGPU/SI: Improve register allocation hints for sopk instructions
2016-08-29 13:06:10 +00:00
shl_add_ptr.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
shl.ll
AMDGPU: Run r600 tests last
2016-05-05 20:07:37 +00:00
si-annotate-cf-noloop.ll
AMDGPU/SI: Don't handle a loop if there is no loop at all for a terminator BB.
2016-07-28 23:01:45 +00:00
si-annotate-cf.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
si-annotate-cfg-loop-assert.ll
AMDGPU: Un-xfail and add tests
2016-06-24 06:58:01 +00:00
si-instr-info-correct-implicit-operands.ll
[MIR] Print on the given output instead of stderr.
2016-07-13 20:36:03 +00:00
si-literal-folding.ll
AMDGPU: Fix immediate folding logic when shrinking instructions
2016-09-09 23:32:53 +00:00
si-lod-bias.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
si-lower-control-flow-unreachable-block.ll
BranchRelaxation: Support expanding unconditional branches
2016-10-06 16:20:41 +00:00
si-scheduler.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
si-sgpr-spill.ll
AMDGPU: Remove llvm.SI.tid intrinsic
2016-06-17 21:18:41 +00:00
si-spill-cf.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
si-spill-sgpr-stack.ll
AMDGPU: Fix missing -verify-machineinstrs in test
2016-10-03 12:58:59 +00:00
si-triv-disjoint-mem-access.ll
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
2016-10-13 20:23:25 +00:00
si-vector-hang.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
sign_extend.ll
AMDGPU: sext_inreg (srl x, K), vt -> bfe x, K, vt.Size
2016-04-22 22:59:16 +00:00
simplify-demanded-bits-build-pair.ll
…
sint_to_fp.f64.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
sint_to_fp.i64.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
sint_to_fp.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
skip-if-dead.ll
BranchRelaxation: Support expanding unconditional branches
2016-10-06 16:20:41 +00:00
smed3.ll
AMDGPU: Match more med3 integer patterns
2016-03-07 21:54:48 +00:00
sminmax.ll
SelectionDAG: Implement expansion of {S,U}MIN/MAX in integer legalization
2016-06-09 16:04:00 +00:00
smrd-vccz-bug.ll
AMDGPU: Support commuting with immediate in src0
2016-09-08 17:19:29 +00:00
smrd.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
sopk-compares.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
spill-alloc-sgpr-init-bug.ll
AMDGPU: Remove llvm.SI.tid intrinsic
2016-06-17 21:18:41 +00:00
spill-m0.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
spill-scavenge-offset.ll
AMDGPU: Disable scheduling in some slow tests
2016-06-16 00:56:47 +00:00
split-scalar-i64-add.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
split-smrd.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
split-vector-memoperand-offsets.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
sra.ll
MachineScheduler: Fully compare top/bottom candidates
2016-06-25 00:23:00 +00:00
srem.ll
…
srl.ll
ScheduleDAGInstrs: Rework schedule graph builder.
2015-12-04 01:51:19 +00:00
ssubo.ll
…
store_typed.ll
AMDGPU: Add MEM_RAT STORE_TYPED.
2015-10-01 17:51:34 +00:00
store-barrier.ll
AMDGPU: Improve load/store of illegal types.
2016-07-01 22:47:50 +00:00
store-global.ll
AMDGPU/R600: Expand unaligned writes to local and global AS
2016-09-02 19:07:06 +00:00
store-local.ll
AMDGPU/R600: Expand unaligned writes to local and global AS
2016-09-02 19:07:06 +00:00
store-v3i64.ll
AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler
2016-08-29 19:15:22 +00:00
store-vector-ptrs.ll
…
structurize1.ll
AMDGPU: Move subtarget feature checks into passes
2016-06-27 20:32:13 +00:00
structurize.ll
AMDGPU: Remove disable-irstructurizer subtarget feature
2016-06-24 06:30:22 +00:00
sub.ll
AMDGPU: Improve load/store of illegal types.
2016-07-01 22:47:50 +00:00
subreg-coalescer-crash.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
subreg-coalescer-undef-use.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
subreg-eliminate-dead.ll
…
subreg-intervals.mir
Create subranges for new intervals resulting from live interval splitting
2016-08-24 13:37:55 +00:00
swizzle-export.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
target-cpu.ll
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
tex-clause-antidep.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
texture-input-merge.ll
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
2016-07-15 21:27:08 +00:00
trap.ll
AMDGPU: Temporarily select trap to s_endpgm
2016-06-17 22:27:03 +00:00
trunc-bitcast-vector.ll
AMDGPU: Improve load/store of illegal types.
2016-07-01 22:47:50 +00:00
trunc-cmp-constant.ll
[AMDGPU] Promote uniform (i1, i16] operations to i32
2016-10-07 14:22:58 +00:00
trunc-store-f64-to-f16.ll
…
trunc-store-i1.ll
…
trunc-store.ll
AMDGPU: Improve load/store of illegal types.
2016-07-01 22:47:50 +00:00
trunc-vector-store-assertion-failure.ll
…
trunc.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
tti-unroll-prefs.ll
…
uaddo.ll
…
udiv.ll
AMDGPU: Fix high bits after division optimization
2016-05-21 01:53:33 +00:00
udivrem24.ll
AMDGPU: Fix high bits after division optimization
2016-05-21 01:53:33 +00:00
udivrem64.ll
AMDGPU: Fix high bits after division optimization
2016-05-21 01:53:33 +00:00
udivrem.ll
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
uint_to_fp.f64.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
uint_to_fp.i64.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
uint_to_fp.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
umed3.ll
AMDGPU: Match more med3 integer patterns
2016-03-07 21:54:48 +00:00
unaligned-load-store.ll
AMDGPU: Fix introducing stack access on unaligned v16i8
2016-08-31 21:52:27 +00:00
undefined-subreg-liverange.ll
AMDGPU: Fix verifier error from partially undef copy
2016-07-15 22:32:02 +00:00
unhandled-loop-condition-assertion.ll
AMDGPU: Un-xfail and add tests
2016-06-24 06:58:01 +00:00
uniform-branch-intrinsic-cond.ll
AMDGPU: Uniform branch conditions can originate with intrinsics
2016-05-05 17:36:36 +00:00
uniform-cfg.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
uniform-crash.ll
AMDGPU: Fix a few slightly broken tests
2016-05-18 15:48:44 +00:00
uniform-loop-inside-nonuniform.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
unigine-liveness-crash.ll
Do not consider subreg defs as reads when computing subrange liveness
2016-09-02 19:48:55 +00:00
unknown-processor.ll
AMDGPU: Fix crashes on unknown processor name
2016-06-02 18:37:16 +00:00
unroll.ll
…
unsupported-cc.ll
ScheduleDAGInstrs: Rework schedule graph builder.
2015-12-04 01:51:19 +00:00
urecip.ll
…
urem.ll
…
use-sgpr-multiple-times.ll
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
usubo.ll
…
v1i64-kernel-arg.ll
AMDGPU: Refactor kernel argument lowering
2016-09-16 21:53:00 +00:00
v_cndmask.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
v_cvt_pk_u8_f32.ll
AMDGPU : Add intrinsic for instruction v_cvt_pk_u8_f32
2016-08-11 20:34:48 +00:00
v_mac.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
valu-i1.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
vector-alloca.ll
AMDGPU: Remove dead check in AMDGPUPromoteAlloca
2016-07-18 18:34:53 +00:00
vector-extract-insert.ll
Reapply r274829 with fix for FP vectors
2016-07-08 21:25:33 +00:00
vertex-fetch-encoding.ll
AMDGPU/R600: Convert buffer id to VTX_READ input
2016-08-15 21:38:30 +00:00
vgpr-spill-emergency-stack-slot-compute.ll
Reapply "AMDGPU: Don't use offen if it is 0"
2016-10-26 15:08:16 +00:00
vgpr-spill-emergency-stack-slot.ll
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
2016-10-13 20:23:25 +00:00
vi-removed-intrinsics.ll
AMDGPU: Fold more custom nodes to undef
2016-06-20 18:33:56 +00:00
vop-shrink.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
vselect64.ll
…
vselect.ll
AMDGPU: Fix a few slightly broken tests
2016-05-18 15:48:44 +00:00
vtx-fetch-branch.ll
…
vtx-schedule.ll
…
wait.ll
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
waitcnt-flat.ll
AMDGPU: Define priorities for register classes
2016-05-21 03:55:07 +00:00
wqm.ll
Reapply "AMDGPU: Don't use offen if it is 0"
2016-10-26 15:08:16 +00:00
write_register.ll
AMDGPU: Implement read_register and write_register intrinsics
2016-01-26 04:29:24 +00:00
write-register-vgpr-into-sgpr.ll
AMDGPU: Remove some old intrinsic uses from tests
2016-02-11 06:02:01 +00:00
wrong-transalu-pos-fix.ll
AMDGPU: Remove superfluous string attributes from tests
2016-07-11 23:35:48 +00:00
xfail.r600.bitcast.ll
AMDGPU/R600: EXTRACT_VECT_ELT should only bypass BUILD_VECTOR if the vectors have the same number of elements.
2016-09-02 20:13:19 +00:00
xor.ll
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
zero_extend.ll
AMDGPU: Use unsigned compare for eq/ne
2016-09-30 01:50:20 +00:00
zext-i64-bit-operand.ll
AMDGPU: Eliminate half of i64 or if one operand is zero_extend from i32
2016-04-12 18:24:38 +00:00

README 

+==============================================================================+
| How to organize the lit tests                                                |
+==============================================================================+

- If you write a test for matching a single DAG opcode or intrinsic, it should
  go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)

- If you write a test that matches several DAG opcodes and checks for a single
  ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
  bfi_int.ll

- For all other tests, use your best judgement for organizing tests and naming
  the files.

+==============================================================================+
| Naming conventions                                                           |
+==============================================================================+

- Use dash '-' and not underscore '_' to separate words in file names, unless
  the file is named after a DAG opcode or ISA instruction that has an
  underscore '_' in its name.