8a9cb242fb
Summary: Made it convert from register to stack based instructions, and removed the registers. Fixes to related code that was expecting register based instructions. Added the correct testing flag to all tests, depending on what the format they were expecting so far. Translated one test to stack format as example: reg-stackify-stack.ll tested: llvm-lit -v `find test -name WebAssembly` unittests/MC/* Reviewers: dschuff, sunfish Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits, jfb Differential Revision: https://reviews.llvm.org/D51241 llvm-svn: 340750
263 lines
9.5 KiB
C++
263 lines
9.5 KiB
C++
//=- WebAssemblyInstPrinter.cpp - WebAssembly assembly instruction printing -=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// Print MCInst instructions to wasm format.
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///
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//===----------------------------------------------------------------------===//
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#include "InstPrinter/WebAssemblyInstPrinter.h"
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "WebAssembly.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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using namespace llvm;
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#define DEBUG_TYPE "asm-printer"
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#include "WebAssemblyGenAsmWriter.inc"
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WebAssemblyInstPrinter::WebAssemblyInstPrinter(const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI)
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: MCInstPrinter(MAI, MII, MRI), ControlFlowCounter(0) {}
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void WebAssemblyInstPrinter::printRegName(raw_ostream &OS,
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unsigned RegNo) const {
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assert(RegNo != WebAssemblyFunctionInfo::UnusedReg);
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// Note that there's an implicit get_local/set_local here!
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OS << "$" << RegNo;
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}
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void WebAssemblyInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
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StringRef Annot,
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const MCSubtargetInfo &STI) {
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// Print the instruction (this uses the AsmStrings from the .td files).
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printInstruction(MI, OS);
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// Print any additional variadic operands.
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const MCInstrDesc &Desc = MII.get(MI->getOpcode());
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if (Desc.isVariadic())
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for (auto i = Desc.getNumOperands(), e = MI->getNumOperands(); i < e; ++i) {
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// FIXME: For CALL_INDIRECT_VOID, don't print a leading comma, because
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// we have an extra flags operand which is not currently printed, for
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// compatiblity reasons.
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if (i != 0 &&
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((MI->getOpcode() != WebAssembly::CALL_INDIRECT_VOID &&
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MI->getOpcode() != WebAssembly::CALL_INDIRECT_VOID_S) ||
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i != Desc.getNumOperands()))
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OS << ", ";
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printOperand(MI, i, OS);
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}
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// Print any added annotation.
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printAnnotation(OS, Annot);
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if (CommentStream) {
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// Observe any effects on the control flow stack, for use in annotating
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// control flow label references.
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switch (MI->getOpcode()) {
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default:
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break;
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case WebAssembly::LOOP:
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case WebAssembly::LOOP_S: {
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printAnnotation(OS, "label" + utostr(ControlFlowCounter) + ':');
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ControlFlowStack.push_back(std::make_pair(ControlFlowCounter++, true));
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break;
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}
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case WebAssembly::BLOCK:
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case WebAssembly::BLOCK_S:
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ControlFlowStack.push_back(std::make_pair(ControlFlowCounter++, false));
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break;
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case WebAssembly::END_LOOP:
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case WebAssembly::END_LOOP_S:
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// Have to guard against an empty stack, in case of mismatched pairs
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// in assembly parsing.
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if (!ControlFlowStack.empty()) ControlFlowStack.pop_back();
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break;
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case WebAssembly::END_BLOCK:
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case WebAssembly::END_BLOCK_S:
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if (!ControlFlowStack.empty()) printAnnotation(
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OS, "label" + utostr(ControlFlowStack.pop_back_val().first) + ':');
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break;
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}
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// Annotate any control flow label references.
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unsigned NumFixedOperands = Desc.NumOperands;
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SmallSet<uint64_t, 8> Printed;
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for (unsigned i = 0, e = MI->getNumOperands(); i < e; ++i) {
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if (!(i < NumFixedOperands
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? (Desc.OpInfo[i].OperandType ==
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WebAssembly::OPERAND_BASIC_BLOCK)
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: (Desc.TSFlags & WebAssemblyII::VariableOpImmediateIsLabel)))
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continue;
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uint64_t Depth = MI->getOperand(i).getImm();
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if (!Printed.insert(Depth).second)
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continue;
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const auto &Pair = ControlFlowStack.rbegin()[Depth];
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printAnnotation(OS, utostr(Depth) + ": " + (Pair.second ? "up" : "down") +
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" to label" + utostr(Pair.first));
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}
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}
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}
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static std::string toString(const APFloat &FP) {
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// Print NaNs with custom payloads specially.
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if (FP.isNaN() &&
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!FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) &&
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!FP.bitwiseIsEqual(
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APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) {
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APInt AI = FP.bitcastToAPInt();
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return
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std::string(AI.isNegative() ? "-" : "") + "nan:0x" +
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utohexstr(AI.getZExtValue() &
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(AI.getBitWidth() == 32 ? INT64_C(0x007fffff) :
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INT64_C(0x000fffffffffffff)),
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/*LowerCase=*/true);
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}
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// Use C99's hexadecimal floating-point representation.
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static const size_t BufBytes = 128;
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char buf[BufBytes];
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auto Written = FP.convertToHexString(
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buf, /*hexDigits=*/0, /*upperCase=*/false, APFloat::rmNearestTiesToEven);
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(void)Written;
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assert(Written != 0);
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assert(Written < BufBytes);
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return buf;
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}
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void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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const MCOperand &Op = MI->getOperand(OpNo);
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if (Op.isReg()) {
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assert((OpNo < MII.get(MI->getOpcode()).getNumOperands() ||
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MII.get(MI->getOpcode()).TSFlags == 0) &&
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"WebAssembly variable_ops register ops don't use TSFlags");
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unsigned WAReg = Op.getReg();
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if (int(WAReg) >= 0)
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printRegName(O, WAReg);
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else if (OpNo >= MII.get(MI->getOpcode()).getNumDefs())
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O << "$pop" << WebAssemblyFunctionInfo::getWARegStackId(WAReg);
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else if (WAReg != WebAssemblyFunctionInfo::UnusedReg)
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O << "$push" << WebAssemblyFunctionInfo::getWARegStackId(WAReg);
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else
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O << "$drop";
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// Add a '=' suffix if this is a def.
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if (OpNo < MII.get(MI->getOpcode()).getNumDefs())
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O << '=';
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} else if (Op.isImm()) {
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const MCInstrDesc &Desc = MII.get(MI->getOpcode());
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assert((OpNo < Desc.getNumOperands() ||
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(Desc.TSFlags & WebAssemblyII::VariableOpIsImmediate)) &&
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"WebAssemblyII::VariableOpIsImmediate should be set for "
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"variable_ops immediate ops");
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(void)Desc;
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// TODO: (MII.get(MI->getOpcode()).TSFlags &
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// WebAssemblyII::VariableOpImmediateIsLabel)
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// can tell us whether this is an immediate referencing a label in the
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// control flow stack, and it may be nice to pretty-print.
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O << Op.getImm();
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} else if (Op.isFPImm()) {
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const MCInstrDesc &Desc = MII.get(MI->getOpcode());
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assert(OpNo < Desc.getNumOperands() &&
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"Unexpected floating-point immediate as a non-fixed operand");
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assert(Desc.TSFlags == 0 &&
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"WebAssembly variable_ops floating point ops don't use TSFlags");
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const MCOperandInfo &Info = Desc.OpInfo[OpNo];
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if (Info.OperandType == WebAssembly::OPERAND_F32IMM) {
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// TODO: MC converts all floating point immediate operands to double.
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// This is fine for numeric values, but may cause NaNs to change bits.
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O << ::toString(APFloat(float(Op.getFPImm())));
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} else {
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assert(Info.OperandType == WebAssembly::OPERAND_F64IMM);
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O << ::toString(APFloat(Op.getFPImm()));
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}
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} else {
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assert((OpNo < MII.get(MI->getOpcode()).getNumOperands() ||
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(MII.get(MI->getOpcode()).TSFlags &
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WebAssemblyII::VariableOpIsImmediate)) &&
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"WebAssemblyII::VariableOpIsImmediate should be set for "
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"variable_ops expr ops");
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assert(Op.isExpr() && "unknown operand kind in printOperand");
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Op.getExpr()->print(O, &MAI);
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}
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}
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void WebAssemblyInstPrinter::printWebAssemblyP2AlignOperand(
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const MCInst *MI, unsigned OpNo, raw_ostream &O) {
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int64_t Imm = MI->getOperand(OpNo).getImm();
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if (Imm == WebAssembly::GetDefaultP2Align(MI->getOpcode()))
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return;
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O << ":p2align=" << Imm;
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}
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void WebAssemblyInstPrinter::printWebAssemblySignatureOperand(
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const MCInst *MI, unsigned OpNo, raw_ostream &O) {
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int64_t Imm = MI->getOperand(OpNo).getImm();
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switch (WebAssembly::ExprType(Imm)) {
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case WebAssembly::ExprType::Void: break;
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case WebAssembly::ExprType::I32: O << "i32"; break;
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case WebAssembly::ExprType::I64: O << "i64"; break;
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case WebAssembly::ExprType::F32: O << "f32"; break;
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case WebAssembly::ExprType::F64: O << "f64"; break;
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case WebAssembly::ExprType::V128: O << "v128"; break;
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case WebAssembly::ExprType::ExceptRef: O << "except_ref"; break;
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}
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}
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const char *llvm::WebAssembly::TypeToString(MVT Ty) {
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switch (Ty.SimpleTy) {
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case MVT::i32:
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return "i32";
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case MVT::i64:
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return "i64";
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case MVT::f32:
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return "f32";
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case MVT::f64:
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return "f64";
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case MVT::v16i8:
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case MVT::v8i16:
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case MVT::v4i32:
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case MVT::v2i64:
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case MVT::v4f32:
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case MVT::v2f64:
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return "v128";
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case MVT::ExceptRef:
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return "except_ref";
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default:
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llvm_unreachable("unsupported type");
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}
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}
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const char *llvm::WebAssembly::TypeToString(wasm::ValType Type) {
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switch (Type) {
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case wasm::ValType::I32:
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return "i32";
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case wasm::ValType::I64:
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return "i64";
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case wasm::ValType::F32:
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return "f32";
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case wasm::ValType::F64:
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return "f64";
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case wasm::ValType::EXCEPT_REF:
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return "except_ref";
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}
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llvm_unreachable("unsupported type");
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}
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