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llvm-project/llvm/lib/Target/AArch64
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Francesco Petrogalli adb28e0fb2 [llvm][CodeGen] Addressing modes for SVE ldN. 
Reviewers: c-rhodes, efriedma, sdesmalen

Subscribers: huihuiz, tschuett, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77251
2020-07-27 22:18:28 +00:00
..
AsmParser
[AArch64][AsmParser] Add rcpc support in .arch_extension
2020-07-14 10:57:11 +01:00
Disassembler
[AArch64] Emit warning when disassembling unpredictable LDRAA and LDRAB
2020-06-25 15:56:36 +01:00
GISel
[AArch64][GlobalISel] Make <8 x s16> and <16 x s8> legal types for G_SHUFFLE_VECTOR and G_IMPLICIT_DEF.
2020-07-26 00:48:09 -07:00
MCTargetDesc
AArch64: diagnose out of range relocation addends on MachO.
2020-07-27 13:01:22 +01:00
TargetInfo
CMake: Make most target symbols hidden by default
2020-01-14 19:46:52 -08:00
Utils
[AArch64][SVE] Add patterns for unpredicated load/store to frame-indices.
2020-01-22 14:32:27 +00:00
AArch64.h
[AArch64] Extend AArch64SLSHardeningPass to harden BLR instructions.
2020-06-12 07:34:33 +01:00
AArch64.td
[ARM] Add Cortex-A78 and Cortex-X1 Support for Clang and LLVM
2020-07-10 18:24:11 +01:00
AArch64A53Fix835769.cpp
…
AArch64A57FPLoadBalancing.cpp
[llvm] Migrate llvm::make_unique to std::make_unique
2019-08-15 15:54:37 +00:00
AArch64AdvSIMDScalarPass.cpp
[aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-12 22:40:53 +00:00
AArch64AsmPrinter.cpp
[DebugInfo] Update MachineInstr to help support variadic DBG_VALUE instructions
2020-06-22 16:01:12 +01:00
AArch64BranchTargets.cpp
[AArch64] Fix BTI instruction emission.
2020-06-15 15:04:36 +02:00
AArch64CallingConvention.cpp
[Alignment][NFC] Use Align for TargetCallingConv::OrigAlign
2020-06-25 13:21:22 +00:00
AArch64CallingConvention.h
Add Windows Control Flow Guard checks (/guard:cf).
2019-10-28 15:19:39 +00:00
AArch64CallingConvention.td
[Alignment][NFC] Use Align for TargetCallingConv::OrigAlign
2020-06-25 13:21:22 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
[CallSiteInfo] Handle bundles when updating call site info
2020-02-27 13:57:06 +01:00
AArch64CollectLOH.cpp
[AArch64] Fix CollectLOH creating an AdrpAdd LOH when there's a live used reg
2020-06-01 16:00:55 -07:00
AArch64Combine.td
[AArch64][GlobalISel] Add post-legalize combine for sext(trunc(sextload)) -> trunc/copy
2020-07-23 12:06:35 -07:00
AArch64CompressJumpTables.cpp
[Alignment][NFC] Deprecate Align::None()
2020-01-24 12:53:58 +01:00
AArch64CondBrTuning.cpp
[AArch64CondBrTuning] Ignore debug insts when scanning for NZCV clobbers [10/14]
2020-04-22 17:03:40 -07:00
AArch64ConditionalCompares.cpp
DomTree: Remove getChildren() accessor
2020-07-06 21:58:11 +02:00
AArch64ConditionOptimizer.cpp
MachineBasicBlock::updateTerminator now requires an explicit layout successor.
2020-06-06 22:30:51 -04:00
AArch64DeadRegisterDefinitionsPass.cpp
[aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-12 22:40:53 +00:00
AArch64ExpandImm.cpp
…
AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
[SVE] Fix invalid assert in expand_DestructiveOp.
2020-07-04 09:21:40 +00:00
AArch64FalkorHWPFFix.cpp
Prefix some AArch64/ARM passes with "aarch64-"/"arm-"
2020-07-27 11:00:39 -07:00
AArch64FastISel.cpp
AArch64: emit @llvm.debugtrap as brk #0xf000 on all platforms
2020-07-20 10:31:26 +01:00
AArch64FrameLowering.cpp
[AArch64][SVE] Remove erroneous assert in resolveFrameOffsetReference
2020-07-14 09:22:45 +01:00
AArch64FrameLowering.h
[SVE] Don't use LocalStackAllocation for SVE objects
2020-07-27 08:22:01 +01:00
AArch64GenRegisterBankInfo.def
…
AArch64InstrAtomics.td
DAG: Use TargetConstant for FENCE operands
2020-01-02 17:16:10 -05:00
AArch64InstrFormats.td
[AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv
2020-07-27 09:17:53 -06:00
AArch64InstrGISel.td
[AArch64][GlobalISel] Add G_EXT and select ext using it
2020-06-15 12:20:59 -07:00
AArch64InstrInfo.cpp
AArch64: avoid UB shift of negative value
2020-07-27 13:49:50 +01:00
AArch64InstrInfo.h
[AArch64][SVE] NFC: Rename isOrig -> isReverseInstr
2020-07-02 17:01:15 +01:00
AArch64InstrInfo.td
[AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv
2020-07-27 09:17:53 -06:00
AArch64ISelDAGToDAG.cpp
[llvm][CodeGen] Addressing modes for SVE ldN.
2020-07-27 22:18:28 +00:00
AArch64ISelLowering.cpp
[AArch64][SVE] Add "fast" fcmp operations.
2020-07-24 13:22:41 -07:00
AArch64ISelLowering.h
[ARM] Generate [SU]HADD from ((a + b) >> 1)
2020-07-21 13:22:07 +01:00
AArch64LoadStoreOptimizer.cpp
[AArch64] Fix ldst-opt of multiple disjunct subregs.
2020-06-08 20:18:24 +01:00
AArch64MachineFunctionInfo.cpp
MachineFunctionInfo for AArch64 in MIR
2020-04-17 15:16:59 -07:00
AArch64MachineFunctionInfo.h
[MachineOutliner] Annotation for outlined functions in AArch64
2020-04-20 13:33:31 -07:00
AArch64MacroFusion.cpp
…
AArch64MacroFusion.h
…
AArch64MCInstLower.cpp
…
AArch64MCInstLower.h
…
AArch64PBQPRegAlloc.cpp
[aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-12 22:40:53 +00:00
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
…
AArch64PfmCounters.td
…
AArch64PromoteConstant.cpp
[AArch64] Don't promote constants with float ConstantExpr.
2020-05-13 23:31:47 +01:00
AArch64RedundantCopyElimination.cpp
…
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
[AArch64][SVE] Correctly allocate scavenging slot in presence of SVE.
2020-07-22 10:50:36 +01:00
AArch64RegisterInfo.h
[AArch64] Provide Darwin variants of most calling conventions
2020-05-20 16:03:48 -07:00
AArch64RegisterInfo.td
[AArch64][BFloat] basic AArch64 bfloat support
2020-05-27 15:26:40 +01:00
AArch64SchedA53.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedA57.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedA57WriteRes.td
…
AArch64SchedCyclone.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedExynosM3.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedExynosM4.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedExynosM5.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedFalkor.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedFalkorDetails.td
[AArch64] Add BIT/BIF support.
2020-02-14 14:19:39 +00:00
AArch64SchedKryo.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedKryoDetails.td
[AArch64] Add BIT/BIF support.
2020-02-14 14:19:39 +00:00
AArch64SchedPredExynos.td
[AArch64] Add new scheduling predicates
2019-11-11 15:02:51 -06:00
AArch64SchedPredicates.td
[NFC] [AArch64] Fix wrong documentation for IsStoreRegOffsetOp
2019-11-23 19:11:31 +01:00
AArch64SchedThunderX2T99.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedThunderX3T110.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedThunderX.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
[Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemset to Align
2020-06-30 12:46:26 +00:00
AArch64SelectionDAGInfo.h
[Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemset to Align
2020-06-30 12:46:26 +00:00
AArch64SIMDInstrOpt.cpp
Make llvm::StringRef to std::string conversions explicit.
2020-01-28 23:25:25 +01:00
AArch64SLSHardening.cpp
[NFC] Clean up uses of MachineModuleInfoWrapperPass
2020-07-01 09:45:05 -07:00
AArch64SpeculationHardening.cpp
Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
2019-10-19 01:31:09 +00:00
AArch64StackOffset.h
Explicitly include <cassert> when using assert
2020-03-02 22:45:28 +01:00
AArch64StackTagging.cpp
Prefix some AArch64/ARM passes with "aarch64-"/"arm-"
2020-07-27 11:00:39 -07:00
AArch64StackTaggingPreRA.cpp
MTE: add more unchecked instructions.
2019-11-19 11:19:53 -08:00
AArch64StorePairSuppress.cpp
Add OffsetIsScalable to getMemOperandWithOffset
2020-02-18 15:53:29 +00:00
AArch64Subtarget.cpp
[ARM] Add Cortex-A78 and Cortex-X1 Support for Clang and LLVM
2020-07-10 18:24:11 +01:00
AArch64Subtarget.h
[ARM] Add Cortex-A78 and Cortex-X1 Support for Clang and LLVM
2020-07-10 18:24:11 +01:00
AArch64SVEInstrInfo.td
[AArch64][SVE] Add "fast" fcmp operations.
2020-07-24 13:22:41 -07:00
AArch64SystemOperands.td
[AArch64] Remove inexistent system register ERXTS_EL1
2020-04-29 16:43:48 +01:00
AArch64TargetMachine.cpp
Prefix some AArch64/ARM passes with "aarch64-"/"arm-"
2020-07-27 11:00:39 -07:00
AArch64TargetMachine.h
MachineFunctionInfo for AArch64 in MIR
2020-04-17 15:16:59 -07:00
AArch64TargetObjectFile.cpp
[X86] Reland D71360 Clean up UseInitArray initialization for X86ELFTargetObjectFile
2020-03-20 21:57:34 -07:00
AArch64TargetObjectFile.h
[llvm][ELF][AArch64] Handle R_AARCH64_PLT32 relocation
2020-06-10 11:34:16 -07:00
AArch64TargetTransformInfo.cpp
[NFC] Separate Peeling Properties into its own struct (re-land after minor fix)
2020-07-10 18:39:30 +00:00
AArch64TargetTransformInfo.h
[NFC] Separate Peeling Properties into its own struct (re-land after minor fix)
2020-07-10 18:39:30 +00:00
CMakeLists.txt
[AArch64] Introduce AArch64SLSHardeningPass, implementing hardening of RET and BR instructions.
2020-06-11 07:51:17 +01:00
LLVMBuild.txt
Add Windows Control Flow Guard checks (/guard:cf).
2019-10-28 15:19:39 +00:00
SVEInstrFormats.td
[llvm][sve] Reg + Imm addressing mode for ld1ro.
2020-07-24 17:48:47 +00:00
SVEIntrinsicOpts.cpp
Prefix some AArch64/ARM passes with "aarch64-"/"arm-"
2020-07-27 11:00:39 -07:00