ad16e71c95
Reapply with DTU update moved after CFG update, which is a requirement of the API. ----- Non-feasible control-flow edges are currently removed by replacing the branch condition with a constant and then calling ConstantFoldTerminator. This happens in a rather roundabout manner, by inspecting the users (effectively: predecessors) of unreachable blocks, and further complicated by the need to explicitly materialize the condition for "forced" edges. I would like to extend SCCP to discard switch conditions that are non-feasible based on range information, but this is incompatible with the current approach (as there is no single constant we could use.) Instead, this patch explicitly removes non-feasible edges. It currently only needs to handle the case where there is a single feasible edge. The llvm_unreachable() branch will need to be implemented for the aforementioned switch improvement. Differential Revision: https://reviews.llvm.org/D84264
268 lines
6.4 KiB
LLVM
268 lines
6.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -ipsccp < %s | FileCheck %s
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; Make sure we always consider the default edge executable for a switch
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; with no cases.
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declare void @foo()
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define void @test1() {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: switch i32 undef, label [[D:%.*]] [
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; CHECK-NEXT: ]
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; CHECK: d:
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; CHECK-NEXT: call void @foo()
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; CHECK-NEXT: ret void
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;
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switch i32 undef, label %d []
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d:
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call void @foo()
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ret void
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}
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define i32 @test_duplicate_successors_phi(i1 %c, i32 %x) {
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; CHECK-LABEL: @test_duplicate_successors_phi(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[SWITCH:%.*]], label [[END:%.*]]
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; CHECK: switch:
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; CHECK-NEXT: br label [[SWITCH_DEFAULT:%.*]]
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; CHECK: switch.default:
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; CHECK-NEXT: ret i32 -1
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; CHECK: end:
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; CHECK-NEXT: ret i32 [[X:%.*]]
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;
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entry:
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br i1 %c, label %switch, label %end
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switch:
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switch i32 -1, label %switch.default [
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i32 0, label %end
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i32 1, label %end
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]
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switch.default:
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ret i32 -1
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end:
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%phi = phi i32 [ %x, %entry ], [ 1, %switch ], [ 1, %switch ]
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ret i32 %phi
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}
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define i32 @test_duplicate_successors_phi_2(i1 %c, i32 %x) {
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; CHECK-LABEL: @test_duplicate_successors_phi_2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[SWITCH:%.*]], label [[END:%.*]]
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; CHECK: switch:
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[X:%.*]], [[ENTRY:%.*]] ], [ 1, [[SWITCH]] ]
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; CHECK-NEXT: ret i32 [[PHI]]
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;
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entry:
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br i1 %c, label %switch, label %end
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switch:
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switch i32 0, label %switch.default [
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i32 0, label %end
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i32 1, label %end
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]
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switch.default:
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ret i32 -1
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end:
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%phi = phi i32 [ %x, %entry ], [ 1, %switch ], [ 1, %switch ]
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ret i32 %phi
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}
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define i32 @test_duplicate_successors_phi_3(i1 %c1, i32 %x) {
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; CHECK-LABEL: @test_duplicate_successors_phi_3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C1:%.*]], label [[SWITCH:%.*]], label [[SWITCH_1:%.*]]
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; CHECK: switch:
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; CHECK-NEXT: [[C2:%.*]] = icmp ult i32 [[X:%.*]], 3
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; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
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; CHECK-NEXT: switch i32 [[X]], label [[SWITCH_DEFAULT:%.*]] [
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; CHECK-NEXT: i32 0, label [[SWITCH_DEFAULT]]
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; CHECK-NEXT: i32 1, label [[SWITCH_0:%.*]]
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; CHECK-NEXT: i32 2, label [[SWITCH_0]]
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; CHECK-NEXT: i32 3, label [[SWITCH_1]]
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; CHECK-NEXT: i32 4, label [[SWITCH_1]]
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; CHECK-NEXT: ]
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; CHECK: switch.default:
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; CHECK-NEXT: ret i32 -1
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; CHECK: switch.0:
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; CHECK-NEXT: ret i32 0
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; CHECK: switch.1:
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; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[X]], [[ENTRY:%.*]] ], [ 0, [[SWITCH]] ], [ 0, [[SWITCH]] ]
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; CHECK-NEXT: ret i32 [[PHI]]
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;
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entry:
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br i1 %c1, label %switch, label %switch.1
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switch:
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%c2 = icmp ult i32 %x, 3
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call void @llvm.assume(i1 %c2)
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switch i32 %x, label %switch.default [
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i32 0, label %switch.default
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i32 1, label %switch.0
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i32 2, label %switch.0
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i32 3, label %switch.1
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i32 4, label %switch.1
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]
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switch.default:
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ret i32 -1
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switch.0:
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ret i32 0
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switch.1:
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%phi = phi i32 [ %x, %entry ], [ 0, %switch ], [ 0, %switch ]
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ret i32 %phi
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}
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define i32 @test_local_range(i32 %x) {
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; CHECK-LABEL: @test_local_range(
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; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], 3
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; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
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; CHECK-NEXT: switch i32 [[X]], label [[SWITCH_DEFAULT:%.*]] [
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; CHECK-NEXT: i32 0, label [[SWITCH_0:%.*]]
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; CHECK-NEXT: i32 1, label [[SWITCH_1:%.*]]
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; CHECK-NEXT: i32 2, label [[SWITCH_2:%.*]]
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; CHECK-NEXT: i32 3, label [[SWITCH_3:%.*]]
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; CHECK-NEXT: ]
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; CHECK: switch.default:
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; CHECK-NEXT: ret i32 -1
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; CHECK: switch.0:
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; CHECK-NEXT: ret i32 0
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; CHECK: switch.1:
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; CHECK-NEXT: ret i32 1
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; CHECK: switch.2:
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; CHECK-NEXT: ret i32 2
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; CHECK: switch.3:
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; CHECK-NEXT: ret i32 3
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;
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%c = icmp ult i32 %x, 3
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call void @llvm.assume(i1 %c)
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switch i32 %x, label %switch.default [
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i32 0, label %switch.0
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i32 1, label %switch.1
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i32 2, label %switch.2
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i32 3, label %switch.3
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]
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switch.default:
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ret i32 -1
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switch.0:
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ret i32 0
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switch.1:
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ret i32 1
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switch.2:
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ret i32 2
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switch.3:
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ret i32 3
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}
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define i32 @test_duplicate_successors(i32 %x) {
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; CHECK-LABEL: @test_duplicate_successors(
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; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], 3
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; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
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; CHECK-NEXT: switch i32 [[X]], label [[SWITCH_DEFAULT:%.*]] [
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; CHECK-NEXT: i32 0, label [[SWITCH_0:%.*]]
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; CHECK-NEXT: i32 1, label [[SWITCH_0]]
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; CHECK-NEXT: i32 2, label [[SWITCH_1:%.*]]
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; CHECK-NEXT: i32 3, label [[SWITCH_1]]
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; CHECK-NEXT: i32 4, label [[SWITCH_2:%.*]]
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; CHECK-NEXT: i32 5, label [[SWITCH_2]]
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; CHECK-NEXT: ]
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; CHECK: switch.default:
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; CHECK-NEXT: ret i32 -1
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; CHECK: switch.0:
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; CHECK-NEXT: ret i32 0
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; CHECK: switch.1:
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; CHECK-NEXT: ret i32 1
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; CHECK: switch.2:
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; CHECK-NEXT: ret i32 2
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;
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%c = icmp ult i32 %x, 3
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call void @llvm.assume(i1 %c)
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switch i32 %x, label %switch.default [
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i32 0, label %switch.0
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i32 1, label %switch.0
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i32 2, label %switch.1
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i32 3, label %switch.1
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i32 4, label %switch.2
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i32 5, label %switch.2
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]
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switch.default:
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ret i32 -1
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switch.0:
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ret i32 0
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switch.1:
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ret i32 1
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switch.2:
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ret i32 2
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}
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define internal i32 @test_ip_range(i32 %x) {
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; CHECK-LABEL: @test_ip_range(
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; CHECK-NEXT: switch i32 [[X:%.*]], label [[SWITCH_DEFAULT:%.*]] [
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; CHECK-NEXT: i32 0, label [[SWITCH_0:%.*]]
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; CHECK-NEXT: i32 1, label [[SWITCH_1:%.*]]
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; CHECK-NEXT: i32 2, label [[SWITCH_2:%.*]]
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; CHECK-NEXT: i32 3, label [[SWITCH_3:%.*]]
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; CHECK-NEXT: ]
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; CHECK: switch.default:
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; CHECK-NEXT: ret i32 -1
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; CHECK: switch.0:
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; CHECK-NEXT: ret i32 0
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; CHECK: switch.1:
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; CHECK-NEXT: ret i32 1
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; CHECK: switch.2:
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; CHECK-NEXT: ret i32 2
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; CHECK: switch.3:
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; CHECK-NEXT: ret i32 3
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;
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switch i32 %x, label %switch.default [
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i32 0, label %switch.0
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i32 1, label %switch.1
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i32 2, label %switch.2
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i32 3, label %switch.3
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]
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switch.default:
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ret i32 -1
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switch.0:
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ret i32 0
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switch.1:
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ret i32 1
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switch.2:
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ret i32 2
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switch.3:
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ret i32 3
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}
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define void @call_test_ip_range() {
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; CHECK-LABEL: @call_test_ip_range(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @test_ip_range(i32 1)
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; CHECK-NEXT: [[TMP2:%.*]] = call i32 @test_ip_range(i32 3)
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; CHECK-NEXT: ret void
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;
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call i32 @test_ip_range(i32 1)
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call i32 @test_ip_range(i32 3)
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ret void
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}
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declare void @llvm.assume(i1)
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