9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
152 lines
4.0 KiB
LLVM
152 lines
4.0 KiB
LLVM
; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-enable-ds128 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
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; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s
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; Testing for ds_read/write_128
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; RUN: llc -mtriple=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; FUNC-LABEL: {{^}}load_f32_local:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; GCN: ds_read_b32
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; EG: LDS_READ_RET
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define amdgpu_kernel void @load_f32_local(ptr addrspace(1) %out, ptr addrspace(3) %in) #0 {
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entry:
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%tmp0 = load float, ptr addrspace(3) %in
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store float %tmp0, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_v2f32_local:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; GCN: ds_read_b64
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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define amdgpu_kernel void @load_v2f32_local(ptr addrspace(1) %out, ptr addrspace(3) %in) #0 {
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entry:
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%tmp0 = load <2 x float>, ptr addrspace(3) %in
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store <2 x float> %tmp0, ptr addrspace(1) %out
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ret void
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}
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; FIXME: should this do a read2_b64?
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; FUNC-LABEL: {{^}}local_load_v3f32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; SI-DAG: ds_read_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:8
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; SI-DAG: ds_read_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+$}}
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; CIVI-DAG: ds_read_b96 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+$}}
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; GCN: s_waitcnt
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; SI-DAG: ds_write_b64
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; SI-DAG: ds_write_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:8{{$}}
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; CIVI-DAG: ds_write_b96 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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define amdgpu_kernel void @local_load_v3f32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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entry:
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%tmp0 = load <3 x float>, ptr addrspace(3) %in
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store <3 x float> %tmp0, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_load_v4f32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; GCN: ds_read2_b64
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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define amdgpu_kernel void @local_load_v4f32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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entry:
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%tmp0 = load <4 x float>, ptr addrspace(3) %in
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store <4 x float> %tmp0, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_load_v8f32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; GCN: ds_read2_b64
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; GCN: ds_read2_b64
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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define amdgpu_kernel void @local_load_v8f32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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entry:
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%tmp0 = load <8 x float>, ptr addrspace(3) %in
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store <8 x float> %tmp0, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_load_v16f32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; GCN: ds_read2_b64
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; GCN: ds_read2_b64
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; GCN: ds_read2_b64
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; GCN: ds_read2_b64
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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define amdgpu_kernel void @local_load_v16f32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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entry:
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%tmp0 = load <16 x float>, ptr addrspace(3) %in
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store <16 x float> %tmp0, ptr addrspace(3) %out
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ret void
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}
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; Tests if ds_read/write_b128 gets generated for the 16 byte aligned load.
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; FUNC-LABEL: {{^}}local_v4f32_to_128:
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; SI-NOT: ds_read_b128
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; SI-NOT: ds_write_b128
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; CIVI: ds_read_b128
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; CIVI: ds_write_b128
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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; EG: LDS_READ_RET
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define amdgpu_kernel void @local_v4f32_to_128(ptr addrspace(3) %out, ptr addrspace(3) %in) {
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%ld = load <4 x float>, ptr addrspace(3) %in, align 16
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store <4 x float> %ld, ptr addrspace(3) %out, align 16
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ret void
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}
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attributes #0 = { nounwind }
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