8dc1eee77d
This removes -O1 from the SVE ACLE intrinsics tests and replaces it with -O0 and "opt -mem2reg -instcombine -tailcallelim". Instrcombine and TailCallElim are only added to keep the differences smaller and can be removed in a followup patches. The only remaining differences in the tests are tbaa nodes not being emitted under -O0, and the removable of some tailcall flags.
31 lines
2.3 KiB
C
31 lines
2.3 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// REQUIRES: aarch64-registered-target
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -mem2reg -instcombine -tailcallelim | FileCheck %s
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -mem2reg -instcombine -tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
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// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -mem2reg -instcombine -tailcallelim | FileCheck %s
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// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -mem2reg -instcombine -tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
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#include <arm_sve.h>
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#ifdef SVE_OVERLOADED_FORMS
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// A simple used,unused... macro, long enough to represent any SVE builtin.
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#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
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#else
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#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
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#endif
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// CHECK-LABEL: @test_svbrkpa_b_z(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.brkpa.z.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP1:%.*]], <vscale x 16 x i1> [[OP2:%.*]])
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// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]
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//
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// CPP-CHECK-LABEL: @_Z16test_svbrkpa_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t(
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// CPP-CHECK-NEXT: entry:
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// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.brkpa.z.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP1:%.*]], <vscale x 16 x i1> [[OP2:%.*]])
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// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]
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//
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svbool_t test_svbrkpa_b_z(svbool_t pg, svbool_t op1, svbool_t op2)
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{
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return SVE_ACLE_FUNC(svbrkpa,_b,_z,)(pg, op1, op2);
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}
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