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llvm-project/llvm/test/CodeGen
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Nicola Lancellotti 43fe14c056 [AArch64] Canonicalize ZERO_EXTEND to VSELECT 
Differential Revision: https://reviews.llvm.org/D135596
2022-10-17 15:42:46 +01:00
..
AArch64
[AArch64] Canonicalize ZERO_EXTEND to VSELECT
2022-10-17 15:42:46 +01:00
AMDGPU
[AMDGPU] Add regression test cases reported on D136042
2022-10-17 14:54:27 +01:00
ARC
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ARM
[ARM] Support fp16/bf16 using w constraint
2022-10-13 10:32:06 +01:00
AVR
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BPF
[BPF] Add (failing) testcase for Issue #57872
2022-10-16 18:16:18 +01:00
CSKY
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DirectX
[DX] Add pass to pretty-print DXIL metadata in asm
2022-10-14 13:32:59 -05:00
Generic
[VP] Add IR expansion for vp.icmp and vp.fcmp
2022-10-05 08:07:39 +01:00
Hexagon
[Hexagon] Recognize idioms for fixed-point vector multiplication
2022-10-14 15:22:25 -07:00
Inputs
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Lanai
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LoongArch
[LoongArch] Fix wrong VariantKind for MO_GOT_PC_{HI/LO} flags
2022-10-15 17:45:08 +08:00
M68k
[M68k] Fix the crash of fast register allocator
2022-09-15 09:24:22 +08:00
Mips
[CodeGen] Using ZExt for extractelement indices.
2022-10-15 15:45:35 -07:00
MIR
MachineVerifier: Verify REG_SEQUENCE
2022-09-22 09:51:15 -04:00
MLRegalloc
UPdate reference-log-noml.txt as well to adapt for D133902
2022-09-30 18:03:28 -07:00
MSP430
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NVPTX
[NVPTX] Support neg{.ftz} for f16 and f16x2
2022-10-13 10:48:33 -07:00
PowerPC
[CodeGen] Using ZExt for extractelement indices.
2022-10-15 15:45:35 -07:00
RISCV
[CodeGen] Using ZExt for extractelement indices.
2022-10-15 15:45:35 -07:00
SPARC
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SPIRV
[SPIRV] Fix formatting of function tests
2022-10-14 01:55:27 +02:00
SystemZ
[SystemZ] Revert migration of SystemZ/Large/branch-01.ll
2022-10-12 14:24:04 +00:00
Thumb
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Thumb2
Propagate tied operands when copying a MachineInstr.
2022-10-13 09:40:35 +01:00
VE
[CodeGen] Using ZExt for extractelement indices.
2022-10-15 15:45:35 -07:00
WebAssembly
[CodeGen] Using ZExt for extractelement indices.
2022-10-15 15:45:35 -07:00
WinCFGuard
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WinEH
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X86
[NFC][X86] Test commit, add test with bad mask vector legalization
2022-10-16 22:22:10 +03:00
XCore
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