8eae660ae0
With these dropped and memory intrinsic moved into a generic pass, we can drop the whole pass. No tests fail with this removed. The new amdgcn intrinsics are annotated in clang up front. Theoretically may regress r600, but that would need new testing and support work (r600 ideally would also follow the clang handling). The regression would be any IR passes making use of known bits between this point and codegen. The DAG computeKnownBits understand the intrinsics directly now. If we wanted to refine these values, a better place would be in AMDGPUAttributor.
145 lines
3.7 KiB
C++
145 lines
3.7 KiB
C++
//===-- AMDGPULowerIntrinsics.cpp -----------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPU.h"
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#include "AMDGPUSubtarget.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/IntrinsicsR600.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Transforms/Utils/LowerMemIntrinsics.h"
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#define DEBUG_TYPE "amdgpu-lower-intrinsics"
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using namespace llvm;
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namespace {
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static int MaxStaticSize;
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static cl::opt<int, true> MemIntrinsicExpandSizeThresholdOpt(
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"amdgpu-mem-intrinsic-expand-size",
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cl::desc("Set minimum mem intrinsic size to expand in IR"),
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cl::location(MaxStaticSize),
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cl::init(1024),
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cl::Hidden);
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class AMDGPULowerIntrinsics : public ModulePass {
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public:
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static char ID;
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AMDGPULowerIntrinsics() : ModulePass(ID) {}
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bool runOnModule(Module &M) override;
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bool expandMemIntrinsicUses(Function &F);
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StringRef getPassName() const override {
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return "AMDGPU Lower Intrinsics";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addRequired<TargetTransformInfoWrapperPass>();
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}
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};
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}
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char AMDGPULowerIntrinsics::ID = 0;
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char &llvm::AMDGPULowerIntrinsicsID = AMDGPULowerIntrinsics::ID;
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INITIALIZE_PASS(AMDGPULowerIntrinsics, DEBUG_TYPE, "Lower intrinsics", false,
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false)
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// TODO: Should refine based on estimated number of accesses (e.g. does it
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// require splitting based on alignment)
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static bool shouldExpandOperationWithSize(Value *Size) {
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ConstantInt *CI = dyn_cast<ConstantInt>(Size);
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return !CI || (CI->getSExtValue() > MaxStaticSize);
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}
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bool AMDGPULowerIntrinsics::expandMemIntrinsicUses(Function &F) {
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Intrinsic::ID ID = F.getIntrinsicID();
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bool Changed = false;
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for (User *U : llvm::make_early_inc_range(F.users())) {
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Instruction *Inst = cast<Instruction>(U);
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switch (ID) {
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case Intrinsic::memcpy: {
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auto *Memcpy = cast<MemCpyInst>(Inst);
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if (shouldExpandOperationWithSize(Memcpy->getLength())) {
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Function *ParentFunc = Memcpy->getParent()->getParent();
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const TargetTransformInfo &TTI =
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getAnalysis<TargetTransformInfoWrapperPass>().getTTI(*ParentFunc);
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expandMemCpyAsLoop(Memcpy, TTI);
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Changed = true;
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Memcpy->eraseFromParent();
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}
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break;
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}
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case Intrinsic::memmove: {
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auto *Memmove = cast<MemMoveInst>(Inst);
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if (shouldExpandOperationWithSize(Memmove->getLength())) {
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expandMemMoveAsLoop(Memmove);
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Changed = true;
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Memmove->eraseFromParent();
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}
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break;
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}
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case Intrinsic::memset: {
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auto *Memset = cast<MemSetInst>(Inst);
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if (shouldExpandOperationWithSize(Memset->getLength())) {
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expandMemSetAsLoop(Memset);
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Changed = true;
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Memset->eraseFromParent();
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}
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break;
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}
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default:
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break;
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}
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}
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return Changed;
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}
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bool AMDGPULowerIntrinsics::runOnModule(Module &M) {
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bool Changed = false;
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for (Function &F : M) {
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if (!F.isDeclaration())
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continue;
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switch (F.getIntrinsicID()) {
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case Intrinsic::memcpy:
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case Intrinsic::memmove:
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case Intrinsic::memset:
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if (expandMemIntrinsicUses(F))
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Changed = true;
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break;
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default:
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break;
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}
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}
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return Changed;
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}
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ModulePass *llvm::createAMDGPULowerIntrinsicsPass() {
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return new AMDGPULowerIntrinsics();
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}
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