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llvm-project/llvm/test/CodeGen
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Craig Topper 8fb8fb2c60 [RISCV] Add test cases for missed opportunities to use sbsetw/sbclrw/sbinvw when the result isn't known to be sign extended. 
If the input isn't sign extended, but the output of the or/xor/and
is used by a sign_inreg we can still use sbsetw/sbclrw/sbinvw.
2020-11-26 02:03:06 -08:00
..
AArch64
[LegalizerTypes] Add support for scalarizing the operand of an FP_EXTEND when the result type is legal.
2020-11-25 20:30:21 -08:00
AMDGPU
[AMDGPU] Actually fully update opt-pipeline.ll test to account for -loop-idiom vs -indvars switch
2020-11-25 19:39:32 +03:00
ARC
…
ARM
[FastISel] Flush local value map on ever instruction
2020-11-25 13:05:00 -05:00
AVR
[AVR] Optimize the 16-bit NEGW pseudo instruction
2020-11-17 17:51:58 +08:00
BPF
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
Generic
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
Hexagon
[Hexagon] Add support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns
2020-11-25 19:02:17 +00:00
Inputs
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Lanai
…
Mips
[FastISel] Flush local value map on ever instruction
2020-11-25 13:05:00 -05:00
MIR
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
MSP430
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
NVPTX
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
PowerPC
[SelectionDAGBuilder] Add SPF_NABS support to visitSelect
2020-11-25 14:54:26 -08:00
RISCV
[RISCV] Add test cases for missed opportunities to use sbsetw/sbclrw/sbinvw when the result isn't known to be sign extended.
2020-11-26 02:03:06 -08:00
SPARC
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
SystemZ
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
Thumb
OpaquePtr: Update more tests to use typed sret
2020-11-20 20:08:43 -05:00
Thumb2
[SelectionDAG][ARM][AArch64][Hexagon][RISCV][X86] Add SDNPCommutative to fma and fmad nodes in tablegen. Remove explicit commuted patterns from targets.
2020-11-23 10:09:20 -08:00
VE
[VE] VE Vector Predicated SDNode, vector add isel and tests
2020-11-23 17:17:07 +01:00
WebAssembly
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
WinCFGuard
[CFGuard] Add address-taken IAT tables and delay-load support
2020-11-17 18:24:45 -08:00
WinEH
…
X86
Adding PoisonValue for representing poison value explicitly in IR
2020-11-25 17:33:51 -07:00
XCore
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00