Alexey Bataev 2f40145826

[RISCV][TTI]Use processShuffleMasks for cost estimations/actual per-register shuffles ...

Patch adds usage of processShuffleMasks in TTI for RISCV. This function is already used for X86
shuffles estimations and in DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE
functions and in RISCV codegen.
Patch allows better cost estimation for sparse masks and unifies
cost/codegen between different targets/passes

Reviewers: preames

Reviewed By: preames

Pull Request: https://github.com/llvm/llvm-project/pull/118103

2025-01-29 07:18:55 -05:00

..

abs.ll

[RISCV][TTI] Implement cost of intrinsic abs with LMUL (#115813)

2024-11-25 17:35:58 +08:00

active_lane_mask.ll

[RISCV][TTI] Implement cost of intrinsic active_lane_mask (#87931)

2024-04-10 10:08:33 +08:00

arith-fp.ll

[RISCV][Test] Add test for vp float arithmetic ops. NFC (#114516)

2024-11-13 16:23:04 +08:00

arith-int.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

2024-11-06 11:53:33 +00:00

cast-half.ll

[RISCV] Remove {s,u}int_to_fp custom op action for f16/bf16 (#111471)

2024-10-10 14:40:24 +01:00

cast.ll

[RISCV] Fix vp-intrinsics args in cost model tests. NFC (#112463)

2024-10-16 12:57:43 +08:00

cmp-select.ll

[RISCV][CostModel] Remove cost of icmp inst in icmp+select with SFB. (#91158)

2024-05-20 16:03:18 +08:00

cmp.ll

[RISCV] Fix vp-intrinsics args in cost model tests. NFC (#112463)

2024-10-16 12:57:43 +08:00

cttz_elts.ll

[RISCV][CostModel] Correct the cost of some reductions (#118072)

2024-12-04 17:26:54 +08:00

extractelement.ll

[RISCV][CostModel] Estimate cost of Extract/InsertElement with non-constant index when vector instructions are not available (#67334)

2023-09-27 13:12:42 +03:00

fca-load-store.ll

[RISCV] Remove -riscv-v-vector-bits-min from cost model tests. NFC

2024-09-20 15:02:42 +08:00

fixed-vector-gather.ll

[RISCV] Lower fixed-length mgather/mscatter for zvfhmin/zvfbfmin (#114945)

2024-11-06 10:33:06 +08:00

fixed-vector-insert-subvector.ll

[RISCV][TTI] Recognize CONCAT_VECTORS if a shufflevector mask is multiple insert subvector. (#111459)

2024-10-18 20:16:56 +07:00

fixed-vector-scatter.ll

[RISCV] Lower fixed-length mgather/mscatter for zvfhmin/zvfbfmin (#114945)

2024-11-06 10:33:06 +08:00

fp-min-max-abs.ll

[RISCV][CostModel] Add cost for fabs/fsqrt of type bf16/f16 (#118608)

2025-01-10 17:22:51 +08:00

fp-sqrt-pow.ll

[RISCV][CostModel] Add cost for fabs/fsqrt of type bf16/f16 (#118608)

2025-01-10 17:22:51 +08:00

fp-trig-log-exp.ll

[Test] Rename the test function name suffix. NFC (#114504)

2024-11-01 13:49:34 +08:00

fround.ll

[Test] Rename the test function name suffix. NFC (#114504)

2024-11-01 13:49:34 +08:00

gep-zero-indices.ll

…

gep.ll

[RISCV][TTI] Reduce cost of a build_vector pattern (#108419)

2024-09-20 08:34:36 -07:00

insertelement.ll

[RISCV][CostModel] Estimate cost of Extract/InsertElement with non-constant index when vector instructions are not available (#67334)

2023-09-27 13:12:42 +03:00

int-bit-manip.ll

[TTI][RISCV] Implement cost of some intrinsics with LMUL (#117874)

2024-12-03 10:17:52 +08:00

int-min-max.ll

[Test] Rename the test function name suffix. NFC (#114504)

2024-11-01 13:49:34 +08:00

int-sat-math.ll

[TTI][RISCV] Implement cost of some intrinsics with LMUL (#117874)

2024-12-03 10:17:52 +08:00

lit.local.cfg

…

load-to-trunc.ll

[opt] Infer DataLayout from triple if not specified

2023-10-26 12:07:37 -07:00

logicalop.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

2024-11-06 11:53:33 +00:00

masked_ldst.ll

[TTI] getCommonMaskedMemoryOpCost - use the target getMemoryOpCost/getCFInstrCost implementations.

2024-05-11 12:50:26 +01:00

phi-const.ll

…

reduce-add.ll

[RISCV] Remove -riscv-v-vector-bits-min from cost model tests. NFC

2024-09-20 15:02:42 +08:00

reduce-and-i1.ll

[RISCV] Fix the cost of llvm.vector.reduce.and (#119160)

2025-01-10 10:10:42 +08:00

reduce-and.ll

[RISCV] Fix the cost of llvm.vector.reduce.and (#119160)

2025-01-10 10:10:42 +08:00

reduce-fadd.ll

[RISCV] Cost ordered bf16/f16 w/ zvfhmin reductions as invalid (#114250)

2024-10-31 23:36:09 +08:00

reduce-fmaximum.ll

[RISCV] Remove -riscv-v-vector-bits-min from cost model tests. NFC

2024-09-20 15:02:42 +08:00

reduce-fminimum.ll

[RISCV] Remove -riscv-v-vector-bits-min from cost model tests. NFC

2024-09-20 15:02:42 +08:00

reduce-fmul.ll

[RISCV] Add cost model tests for scalable FP reductions. NFC

2024-10-29 23:58:06 +02:00

reduce-max.ll

[RISCV] Fix the cost of llvm.vector.reduce.and (#119160)

2025-01-10 10:10:42 +08:00

reduce-min.ll

[RISCV] Fix the cost of llvm.vector.reduce.and (#119160)

2025-01-10 10:10:42 +08:00

reduce-or.ll

[RISCV][CostModel] Correct the cost of some reductions (#118072)

2024-12-04 17:26:54 +08:00

reduce-scalable-fp.ll

[RISCV][CostModel] Correct the cost of some reductions (#118072)

2024-12-04 17:26:54 +08:00

reduce-scalable-int.ll

[RISCV][CostModel] Correct the cost of some reductions (#118072)

2024-12-04 17:26:54 +08:00

reduce-xor.ll

[RISCV] Remove -riscv-v-vector-bits-min from cost model tests. NFC

2024-09-20 15:02:42 +08:00

rvv-cmp.ll

[RISCV][NFC] precommit test for fcmp with f16

2025-01-03 01:45:27 -08:00

rvv-extractelement.ll

[RISCV][TTI] Model the cost of insert/extractelt when the vector split into multiple register group and idx exceed single group. (#118401)

2024-12-12 09:26:19 +08:00

rvv-fcmp-f16.ll

[RISCV][NFC] precommit test for fcmp with f16

2025-01-03 01:45:27 -08:00

rvv-insertelement.ll

[RISCV][TTI] Model the cost of insert/extractelt when the vector split into multiple register group and idx exceed single group. (#118401)

2024-12-12 09:26:19 +08:00

rvv-load-store.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

2024-11-06 11:53:33 +00:00

rvv-phi-const.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

2024-11-06 11:53:33 +00:00

rvv-select.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

2024-11-06 11:53:33 +00:00

rvv-shuffle.ll

Move several vector intrinsics out of experimental namespace (#88748)

2024-04-29 10:16:45 +01:00

rvv-vectorextract.ll

Reapply "[RISCV][TTI] Extract subvector at index zero is free (#81751)"

2024-02-15 16:51:15 -08:00

rvv-vectorinsert.ll

[RISCV] Add cost model tests for llvm.vector.{insert,extract}. NFC

2024-02-15 12:17:27 +08:00

scalable-gather.ll

[RISCV] Lower fixed-length mgather/mscatter for zvfhmin/zvfbfmin (#114945)

2024-11-06 10:33:06 +08:00

scalable-scatter.ll

[RISCV] Lower fixed-length mgather/mscatter for zvfhmin/zvfbfmin (#114945)

2024-11-06 10:33:06 +08:00

shuffle-broadcast.ll

[RISCV] Add zvfhmin cost model test coverage. NFC

2024-09-12 18:41:47 +08:00

shuffle-exact-vlen.ll

[RISCV][TTI]Use processShuffleMasks for cost estimations/actual per-register shuffles

2025-01-29 07:18:55 -05:00

shuffle-extract_subvector.ll

[RISCV][TTI]Use processShuffleMasks for cost estimations/actual per-register shuffles

2025-01-29 07:18:55 -05:00

shuffle-insert_subvector.ll

[RISCV][TTI]Use processShuffleMasks for cost estimations/actual per-register shuffles

2025-01-29 07:18:55 -05:00

shuffle-insert.ll

[RISCV][CostModel] Add getRISCVInstructionCost() to TTI for CostKind (#76793)

2024-01-04 21:04:36 +08:00

shuffle-interleave.ll

[CostModel] getInstructionCost - improve estimation of costs for length changing shuffles (#84156)

2024-03-07 10:46:27 +00:00

shuffle-permute.ll

[RISCV] Add zvfhmin cost model test coverage. NFC

2024-09-12 18:41:47 +08:00

shuffle-reverse.ll

[RISCV] Remove -riscv-v-vector-bits-min from cost model tests. NFC

2024-09-20 15:02:42 +08:00

shuffle-select.ll

[RISCV] Adjust select shuffle cost to reflect mask creation cost (#77963)

2024-01-18 10:24:47 -08:00

shuffle-transpose.ll

[RISCV] Remove -riscv-v-vector-bits-min from cost model tests. NFC

2024-09-20 15:02:42 +08:00

splice.ll

[RISCV] Lower vector_splice on zvfhmin/zvfbfmin (#112579)

2024-10-16 21:40:18 +01:00

stepvector.ll

Move stepvector intrinsic out of experimental namespace (#98043)

2024-08-28 12:48:20 +01:00

vector-cost-without-v.ll

[RISCV] Fix crash when unrolling loop containing vector instructions (#83384)

2024-03-02 12:33:55 +08:00

vp-intrinsics.ll

[CostModel] getTypeBasedIntrinsicInstrCost - add default cost approximations for funnel shifts (#124175)

2025-01-24 07:01:49 +00:00