The increase in fallbacks that was previously reported were not caused by this change. Original description: This matches InstCombine and DAGCombine. RISC-V only has an ADDI instruction so without this we need additional patterns to do the conversion. Some of the AMDGPU tests look like possible regressions. Maybe some patterns from isel aren't imported.
370 lines
9.7 KiB
YAML
370 lines
9.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner %s -o - | FileCheck %s
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---
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name: ZeroMinusAPlusB
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: ZeroMinusAPlusB
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s32) = COPY $w0
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; CHECK-NEXT: %b:_(s32) = COPY $w0
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; CHECK-NEXT: %add:_(s32) = G_SUB %b, %a
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; CHECK-NEXT: $w0 = COPY %add(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%a:_(s32) = COPY $w0
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%b:_(s32) = COPY $w0
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%zero:_(s32) = G_CONSTANT i32 0
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%sub:_(s32) = G_SUB %zero, %a
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%add:_(s32) = G_ADD %sub, %b
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$w0 = COPY %add
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RET_ReallyLR implicit $w0
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...
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---
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name: ZeroMinusAPlusB_multi_use
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: ZeroMinusAPlusB_multi_use
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s32) = COPY $w0
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; CHECK-NEXT: %b:_(s32) = COPY $w0
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; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: %sub:_(s32) = G_SUB %zero, %a
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; CHECK-NEXT: %add:_(s32) = G_SUB %b, %a
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; CHECK-NEXT: $w0 = COPY %add(s32)
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; CHECK-NEXT: $w0 = COPY %sub(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%a:_(s32) = COPY $w0
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%b:_(s32) = COPY $w0
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%zero:_(s32) = G_CONSTANT i32 0
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%sub:_(s32) = G_SUB %zero, %a
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%add:_(s32) = G_ADD %sub, %b
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$w0 = COPY %add
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$w0 = COPY %sub
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RET_ReallyLR implicit $w0
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...
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---
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name: APlusZeroMiunusB
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: APlusZeroMiunusB
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s64) = COPY $x1
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; CHECK-NEXT: %b:_(s64) = COPY $x2
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; CHECK-NEXT: %add:_(s64) = G_SUB %a, %b
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; CHECK-NEXT: $x0 = COPY %add(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%x:_(s64) = COPY $x0
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%a:_(s64) = COPY $x1
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%b:_(s64) = COPY $x2
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%zero:_(s64) = G_CONSTANT i64 0
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%sub:_(s64) = G_SUB %zero, %b
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%add:_(s64) = G_ADD %a, %sub
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$x0 = COPY %add
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RET_ReallyLR implicit $x0
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...
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---
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name: APlusBMinusB
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: APlusBMinusB
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %b:_(s64) = COPY $x1
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; CHECK-NEXT: $x0 = COPY %b(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s64) = COPY $x0
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%b:_(s64) = COPY $x1
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%zero:_(s64) = G_CONSTANT i64 0
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%sub:_(s64) = G_SUB %b, %a
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%add:_(s64) = G_ADD %a, %sub
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$x0 = COPY %add
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RET_ReallyLR implicit $x0
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...
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---
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name: BMinusAPlusA
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: BMinusAPlusA
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %b:_(s64) = COPY $x1
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; CHECK-NEXT: $x0 = COPY %b(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s64) = COPY $x0
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%b:_(s64) = COPY $x1
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%zero:_(s64) = G_CONSTANT i64 0
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%sub:_(s64) = G_SUB %b, %a
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%add:_(s64) = G_ADD %sub, %a
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$x0 = COPY %add
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RET_ReallyLR implicit $x0
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...
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---
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name: AMinusBPlusCMinusA
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: AMinusBPlusCMinusA
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %b:_(s64) = COPY $x1
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; CHECK-NEXT: %c:_(s64) = COPY $x2
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; CHECK-NEXT: %add:_(s64) = G_SUB %c, %b
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; CHECK-NEXT: $x0 = COPY %add(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s64) = COPY $x0
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%b:_(s64) = COPY $x1
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%c:_(s64) = COPY $x2
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%zero:_(s64) = G_CONSTANT i64 0
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%sub2:_(s64) = G_SUB %c, %a
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%sub1:_(s64) = G_SUB %a, %b
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%add:_(s64) = G_ADD %sub1, %sub2
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$x0 = COPY %add
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RET_ReallyLR implicit $x0
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...
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---
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name: AMinusBPlusBMinusC
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: AMinusBPlusBMinusC
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s64) = COPY $x0
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; CHECK-NEXT: %c:_(s64) = COPY $x2
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; CHECK-NEXT: %add:_(s64) = G_SUB %a, %c
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; CHECK-NEXT: $x0 = COPY %add(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s64) = COPY $x0
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%b:_(s64) = COPY $x1
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%c:_(s64) = COPY $x2
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%zero:_(s64) = G_CONSTANT i64 0
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%sub2:_(s64) = G_SUB %b, %c
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%sub1:_(s64) = G_SUB %a, %b
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%add:_(s64) = G_ADD %sub1, %sub2
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$x0 = COPY %add
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RET_ReallyLR implicit $x0
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...
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---
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name: APlusBMinusAplusC
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: APlusBMinusAplusC
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %b:_(s64) = COPY $x1
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; CHECK-NEXT: %c:_(s64) = COPY $x2
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; CHECK-NEXT: %add:_(s64) = G_SUB %b, %c
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; CHECK-NEXT: $x0 = COPY %add(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s64) = COPY $x0
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%b:_(s64) = COPY $x1
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%c:_(s64) = COPY $x2
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%zero:_(s64) = G_CONSTANT i64 0
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%add1:_(s64) = G_ADD %a, %c
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%sub1:_(s64) = G_SUB %b, %add1
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%add:_(s64) = G_ADD %a, %sub1
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$x0 = COPY %add
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RET_ReallyLR implicit $x0
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...
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---
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name: APlusBMinusCPlusA
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: APlusBMinusCPlusA
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %b:_(s64) = COPY $x1
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; CHECK-NEXT: %c:_(s64) = COPY $x2
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; CHECK-NEXT: %add:_(s64) = G_SUB %b, %c
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; CHECK-NEXT: $x0 = COPY %add(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s64) = COPY $x0
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%b:_(s64) = COPY $x1
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%c:_(s64) = COPY $x2
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%zero:_(s64) = G_CONSTANT i64 0
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%add1:_(s64) = G_ADD %c, %a
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%sub1:_(s64) = G_SUB %b, %add1
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%add:_(s64) = G_ADD %a, %sub1
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$x0 = COPY %add
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RET_ReallyLR implicit $x0
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...
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---
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name: APlusBMinusCPlusA_BV
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: APlusBMinusCPlusA_BV
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a1:_(s64) = COPY $x0
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; CHECK-NEXT: %b1:_(s64) = COPY $x1
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; CHECK-NEXT: %c1:_(s64) = COPY $x2
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; CHECK-NEXT: %b:_(<2 x s64>) = G_BUILD_VECTOR %b1(s64), %ba:_(s64)
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; CHECK-NEXT: %c:_(<2 x s64>) = G_BUILD_VECTOR %a1(s64), %c1(s64)
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; CHECK-NEXT: %add:_(<2 x s64>) = G_SUB %b, %c
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; CHECK-NEXT: $q0 = COPY %add(<2 x s64>)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a1:_(s64) = COPY $x0
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%b1:_(s64) = COPY $x1
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%c1:_(s64) = COPY $x2
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%a:_(<2 x s64>) = G_BUILD_VECTOR %a1:_(s64), %b1:_(s64)
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%b:_(<2 x s64>) = G_BUILD_VECTOR %b1:_(s64), %ba:_(s64)
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%c:_(<2 x s64>) = G_BUILD_VECTOR %a1:_(s64), %c1:_(s64)
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%zero:_(s64) = G_CONSTANT i64 0
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%add1:_(<2 x s64>) = G_ADD %c, %a
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%sub1:_(<2 x s64>) = G_SUB %b, %add1
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%add:_(<2 x s64>) = G_ADD %a, %sub1
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$q0 = COPY %add
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RET_ReallyLR implicit $x0
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...
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---
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name: APlusC1MinusC2
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: APlusC1MinusC2
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s64) = COPY $x0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -2
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; CHECK-NEXT: %sub:_(s64) = G_ADD %a, [[C]]
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; CHECK-NEXT: $x0 = COPY %sub(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s64) = COPY $x0
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%c1:_(s64) = G_CONSTANT i64 5
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%c2:_(s64) = G_CONSTANT i64 7
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%add:_(s64) = G_ADD %a, %c1
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%sub:_(s64) = G_SUB %add, %c2
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$x0 = COPY %sub
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RET_ReallyLR implicit $x0
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...
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---
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name: C2MinusAPlusC1
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: C2MinusAPlusC1
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s64) = COPY $x0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 5
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; CHECK-NEXT: %sub:_(s64) = G_SUB [[C]], %a
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; CHECK-NEXT: $x0 = COPY %sub(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s64) = COPY $x0
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%c1:_(s64) = G_CONSTANT i64 4
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%c2:_(s64) = G_CONSTANT i64 9
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%add:_(s64) = G_ADD %a, %c1
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%sub:_(s64) = G_SUB %c2, %add
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$x0 = COPY %sub
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RET_ReallyLR implicit $x0
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...
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---
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name: AMinusC1MinusC2
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: AMinusC1MinusC2
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s64) = COPY $x0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -71
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; CHECK-NEXT: %sub:_(s64) = G_ADD %a, [[C]]
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; CHECK-NEXT: $x0 = COPY %sub(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s64) = COPY $x0
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%c1:_(s64) = G_CONSTANT i64 11
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%c2:_(s64) = G_CONSTANT i64 60
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%sub1:_(s64) = G_SUB %a, %c1
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%sub:_(s64) = G_SUB %sub1, %c2
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$x0 = COPY %sub
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RET_ReallyLR implicit $x0
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...
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---
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name: C1Minus2MinusC2
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: C1Minus2MinusC2
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s64) = COPY $x0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -49
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; CHECK-NEXT: %sub:_(s64) = G_SUB [[C]], %a
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; CHECK-NEXT: $x0 = COPY %sub(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s64) = COPY $x0
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%c1:_(s64) = G_CONSTANT i64 11
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%c2:_(s64) = G_CONSTANT i64 60
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%sub1:_(s64) = G_SUB %c1, %a
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%sub:_(s64) = G_SUB %sub1, %c2
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$x0 = COPY %sub
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RET_ReallyLR implicit $x0
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...
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---
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name: AMinusC2PlusC2
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: AMinusC2PlusC2
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s64) = COPY $x0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 43
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; CHECK-NEXT: %add:_(s64) = G_ADD %a, [[C]]
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; CHECK-NEXT: $x0 = COPY %add(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s64) = COPY $x0
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%c1:_(s64) = G_CONSTANT i64 13
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%c2:_(s64) = G_CONSTANT i64 56
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%sub:_(s64) = G_SUB %a, %c1
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%add:_(s64) = G_ADD %sub, %c2
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$x0 = COPY %add
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RET_ReallyLR implicit $x0
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