53326ee0cf
Block sorting was assuming reducible CFG. Meaning we always had a best node to continue with. Irreducible CFG makes breaks this assumption, so the algorithm looped indefinitely because no node was a valid candidate. Fixes #116692 --------- Signed-off-by: Nathan Gauër <brioche@google.com>
52 lines
1.4 KiB
LLVM
52 lines
1.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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define i32 @test_switch_branches(i32 %a) {
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entry:
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%alloc = alloca i32
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; CHECK-SPIRV: OpSwitch %[[#]] %[[#DEFAULT:]] 1 %[[#CASE1:]] 2 %[[#CASE2:]] 3 %[[#CASE3:]]
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switch i32 %a, label %default [
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i32 1, label %case1
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i32 2, label %case2
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i32 3, label %case3
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]
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case1:
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store i32 1, ptr %alloc
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br label %end
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case2:
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store i32 2, ptr %alloc
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br label %end
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case3:
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store i32 3, ptr %alloc
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br label %end
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default:
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store i32 0, ptr %alloc
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br label %end
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end:
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%result = load i32, ptr %alloc
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ret i32 %result
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; CHECK-SPIRV: %[[#CASE3]] = OpLabel
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; CHECK-SPIRV: OpBranch %[[#END:]]
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; CHECK-SPIRV: %[[#CASE2]] = OpLabel
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; CHECK-SPIRV: OpBranch %[[#END]]
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; CHECK-SPIRV: %[[#CASE1]] = OpLabel
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; CHECK-SPIRV: OpBranch %[[#END]]
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; CHECK-SPIRV: %[[#DEFAULT]] = OpLabel
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; CHECK-SPIRV: OpBranch %[[#END]]
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; CHECK-SPIRV: %[[#END]] = OpLabel
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; CHECK-SPIRV: OpReturnValue
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}
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