llvm-project/llvm/test/CodeGen/X86/and-load-fold.ll
Sanjay Patel f0dd12ec5c [x86] use zero-extending load of a byte outside of loops too (2nd try)
The first attempt missed changing test files for tools
(update_llc_test_checks.py).

Original commit message:

This implements the main suggested change from issue #56498.
Using the shorter (non-extending) instruction with only
-Oz ("minsize") rather than -Os ("optsize") is left as a
possible follow-up.

As noted in the bug report, the zero-extending load may have
shorter latency/better throughput across a wide range of x86
micro-arches, and it avoids a potential false dependency.
The cost is an extra instruction byte.

This could cause perf ups and downs from secondary effects,
but I don't think it is possible to account for those in
advance, and that will likely also depend on exact micro-arch.
This does bring LLVM x86 codegen more in line with existing
gcc codegen, so if problems are exposed they are more likely
to occur for both compilers.

Differential Revision: https://reviews.llvm.org/D129775
2022-07-19 21:27:08 -04:00

18 lines
536 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-- -mcpu=generic < %s | FileCheck %s
; Verify that the DAGCombiner doesn't wrongly remove the 'and' from the dag.
define i8 @foo(ptr %V) {
; CHECK-LABEL: foo:
; CHECK: # %bb.0:
; CHECK-NEXT: movzbl 2(%rdi), %eax
; CHECK-NEXT: andb $95, %al
; CHECK-NEXT: retq
%V3i8 = load <3 x i8>, ptr %V, align 4
%t0 = and <3 x i8> %V3i8, <i8 undef, i8 undef, i8 95>
%t1 = extractelement <3 x i8> %t0, i64 2
ret i8 %t1
}