2f448bf509
Test updates were performed using: https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34 These are only the test updates where the test passed without further modification (which is almost all of them, as the backend is largely pointer-type agnostic).
52 lines
1.6 KiB
LLVM
52 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
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; Verify that backwards propagation of a mask does not affect
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; nodes with multiple result values. In both tests, the stored
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; 32-bit value should be masked to an 8-bit number (and 255).
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@b = dso_local local_unnamed_addr global i32 918, align 4
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@d = dso_local local_unnamed_addr global i32 8089, align 4
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@c = common dso_local local_unnamed_addr global i32 0, align 4
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@a = common dso_local local_unnamed_addr global i32 0, align 4
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define dso_local void @PR37667() {
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; CHECK-LABEL: PR37667:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl b(%rip), %eax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: divl d(%rip)
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; CHECK-NEXT: orl c(%rip), %edx
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; CHECK-NEXT: movzbl %dl, %eax
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; CHECK-NEXT: movl %eax, a(%rip)
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; CHECK-NEXT: retq
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%t0 = load i32, ptr @c, align 4
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%t1 = load i32, ptr @b, align 4
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%t2 = load i32, ptr @d, align 4
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%rem = urem i32 %t1, %t2
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%or = or i32 %rem, %t0
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%conv1 = and i32 %or, 255
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store i32 %conv1, ptr @a, align 4
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ret void
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}
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define dso_local void @PR37060() {
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; CHECK-LABEL: PR37060:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl $-1, %eax
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; CHECK-NEXT: cltd
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; CHECK-NEXT: idivl c(%rip)
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; CHECK-NEXT: xorl b(%rip), %edx
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; CHECK-NEXT: movzbl %dl, %eax
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; CHECK-NEXT: movl %eax, a(%rip)
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; CHECK-NEXT: retq
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%t0 = load i32, ptr @c, align 4
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%rem = srem i32 -1, %t0
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%t2 = load i32, ptr @b, align 4
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%xor = xor i32 %t2, %rem
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%conv3 = and i32 %xor, 255
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store i32 %conv3, ptr @a, align 4
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ret void
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}
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