b3458fdec5
Windows x64 Unwind V2 adds epilog information to unwind data: specifically, the length of the epilog and the offset of each epilog. The first step to do this is to add markers to the beginning and end of each epilog when generating Windows x64 code. I've modelled this after how LLVM was marking ARM and AArch64 epilogs in Windows (and unified the code between the three).
124 lines
3.2 KiB
LLVM
124 lines
3.2 KiB
LLVM
; RUN: llc -mtriple x86_64-unknown-windows-msvc %s -o - | FileCheck %s -check-prefix CHECK64
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; RUN: llc -mtriple i686-windows-msvc %s -o - | FileCheck %s -check-prefix CHECK32
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define void @simple(ptr swiftasync %context) "frame-pointer"="all" {
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ret void
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}
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; CHECK64-LABEL: simple:
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; CHECK64: pushq %rbp
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; CHECK64: pushq %rax
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; CHECK64: movq %rsp, %rbp
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; CHECK64: movq %r14, (%rbp)
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; CHECK64: addq $8, %rsp
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; CHECK64: popq %rbp
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; CHECK64: retq
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; CHECK32-LABEL: simple:
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; CHECK32: movl 8(%ebp), [[TMP:%.*]]
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; CHECK32: movl [[TMP]], {{.*}}(%ebp)
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define void @more_csrs(ptr swiftasync %context) "frame-pointer"="all" {
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call void asm sideeffect "", "~{r15}"()
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ret void
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}
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; CHECK64-LABEL: more_csrs:
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; CHECK64: pushq %rbp
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; CHECK64: .seh_pushreg %rbp
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; CHECK64: pushq %r15
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; CHECK64: .seh_pushreg %r15
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; CHECK64: pushq %rax
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; CHECK64: .seh_stackalloc 8
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; CHECK64: movq %rsp, %rbp
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; CHECK64: .seh_setframe %rbp, 0
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; CHECK64: .seh_endprologue
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; CHECK64: movq %r14, (%rbp)
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; [...]
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; CHECK64: .seh_startepilogue
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; CHECK64: addq $8, %rsp
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; CHECK64: popq %r15
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; CHECK64: popq %rbp
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; CHECK64: .seh_endepilogue
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; CHECK64: retq
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declare void @f(ptr)
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define void @locals(ptr swiftasync %context) "frame-pointer"="all" {
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%var = alloca i32, i32 10
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call void @f(ptr %var)
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ret void
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}
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; CHECK64-LABEL: locals:
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; CHECK64: pushq %rbp
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; CHECK64: .seh_pushreg %rbp
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; CHECK64: subq $80, %rsp
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; CHECK64: movq %r14, -8(%rbp)
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; CHECK64: leaq -48(%rbp), %rcx
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; CHECK64: callq f
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; CHECK64: addq $80, %rsp
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; CHECK64: popq %rbp
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; CHECK64: retq
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define void @use_input_context(ptr swiftasync %context, ptr %ptr) "frame-pointer"="all" {
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store ptr %context, ptr %ptr
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ret void
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}
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; CHECK64-LABEL: use_input_context:
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; CHECK64: movq %r14, (%rcx)
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declare ptr @llvm.swift.async.context.addr()
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define ptr @context_in_func() "frmae-pointer"="non-leaf" {
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%ptr = call ptr @llvm.swift.async.context.addr()
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ret ptr %ptr
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}
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; CHECK64-LABEL: context_in_func:
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; CHECK64: movq %rsp, %rax
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; CHECK32-LABEL: context_in_func:
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; CHECK32: movl %esp, %eax
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define void @write_frame_context(ptr swiftasync %context, ptr %new_context) "frame-pointer"="non-leaf" {
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%ptr = call ptr @llvm.swift.async.context.addr()
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store ptr %new_context, ptr %ptr
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ret void
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}
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; CHECK64-LABEL: write_frame_context:
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; CHECK64: movq %rcx, (%rsp)
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define void @simple_fp_elim(ptr swiftasync %context) "frame-pointer"="non-leaf" {
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ret void
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}
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; CHECK64-LABEL: simple_fp_elim:
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; CHECK64-NOT: btsq
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define void @manylocals_and_overwritten_context(ptr swiftasync %context, ptr %new_context) "frame-pointer"="all" {
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%ptr = call ptr @llvm.swift.async.context.addr()
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store ptr %new_context, ptr %ptr
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%var1 = alloca i64, i64 1
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call void @f(ptr %var1)
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%var2 = alloca i64, i64 16
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call void @f(ptr %var2)
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%ptr2 = call ptr @llvm.swift.async.context.addr()
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store ptr %new_context, ptr %ptr2
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ret void
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}
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; CHECK64-LABEL: manylocals_and_overwritten_context:
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; CHECK64: pushq %rbp
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; CHECK64: subq $184, %rsp
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; CHECK64: leaq 128(%rsp), %rbp
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; CHECK64: movq %rcx, %rsi
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; CHECK64: movq %rcx, 48(%rbp)
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; CHECK64: callq f
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; CHECK64: callq f
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; CHECK64: movq %rsi, 48(%rbp)
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