490a867f16
BuildMI automatically adds the implicit operands of the instruction. This meant we couldn''t set the dead flag on dead implicit defs in that case. Fix it by introducing an opcode to mark a given implicit def as dead. Fixes #64565 Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D157515
95 lines
3.5 KiB
LLVM
95 lines
3.5 KiB
LLVM
; RUN: llc -mtriple=x86_64-- -global-isel=0 -print-after=finalize-isel \
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; RUN: -stop-after=finalize-isel %s -o /dev/null 2>&1 | \
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; RUN: FileCheck %s --check-prefix=CHECK-SDISEL
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; RUN: llc -mtriple=x86_64-- -global-isel=1 -print-after=finalize-isel \
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; RUN: -stop-after=finalize-isel %s -o /dev/null 2>&1 | \
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; RUN: FileCheck %s --check-prefix=CHECK-GISEL
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; PR50080
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define i32 @baz(i32 %0) {
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; CHECK-SDISEL: bb.0 (%ir-block.1):
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; CHECK-SDISEL: successors: %bb.4(0x80000000); %bb.4(100.00%)
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; CHECK-SDISEL: liveins: $edi
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; CHECK-SDISEL: %1:gr32 = COPY $edi
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; CHECK-SDISEL: %2:gr32 = MOV32r0 implicit-def dead $eflags
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; CHECK-SDISEL: %3:gr32 = COPY %1:gr32
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; CHECK-SDISEL: bb.4 (%ir-block.1):
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; CHECK-SDISEL: ; predecessors: %bb.0
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; CHECK-SDISEL: successors: %bb.3(0x55555555), %bb.1(0x2aaaaaab); %bb.3(66.67%), %bb.1(33.33%)
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; CHECK-SDISEL: %4:gr32 = MOV32ri 13056
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; CHECK-SDISEL: BT32rr killed %4:gr32, %3:gr32, implicit-def $eflags
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; CHECK-SDISEL: JCC_1 %bb.3, 2, implicit $eflags
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; CHECK-SDISEL: JMP_1 %bb.1
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; CHECK-SDISEL: bb.5 (%ir-block.1):
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; CHECK-SDISEL: bb.1.sw.epilog8:
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; CHECK-SDISEL: ; predecessors: %bb.4
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; CHECK-SDISEL: successors: %bb.3(0x80000000); %bb.3(100.00%)
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; CHECK-SDISEL: %5:gr32 = MOV32ri 1
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; CHECK-SDISEL: JMP_1 %bb.3
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; CHECK-SDISEL: bb.2.if.then.unreachabledefault:
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; CHECK-SDISEL: bb.3.return:
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; CHECK-SDISEL: ; predecessors: %bb.4, %bb.1
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; CHECK-SDISEL: %0:gr32 = PHI %2:gr32, %bb.4, %5:gr32, %bb.1
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; CHECK-SDISEL: $eax = COPY %0:gr32
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; CHECK-SDISEL: RET 0, $eax
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; CHECK-GISEL: bb.1 (%ir-block.1):
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; CHECK-GISEL: successors: %bb.5(0x80000000); %bb.5(100.00%)
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; CHECK-GISEL: liveins: $edi
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; CHECK-GISEL: %0:gr32 = COPY $edi
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; CHECK-GISEL: %10:gr32 = MOV32ri 1
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; CHECK-GISEL: %11:gr32 = MOV32r0 implicit-def dead $eflags
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; CHECK-GISEL: %2:gr32 = SUB32ri %0:gr32(tied-def 0), 0, implicit-def dead $eflags
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; CHECK-GISEL: bb.5 (%ir-block.1):
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; CHECK-GISEL: ; predecessors: %bb.1
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; CHECK-GISEL: successors: %bb.4(0x55555555), %bb.2(0x2aaaaaab); %bb.4(66.67%), %bb.2(33.33%)
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; CHECK-GISEL: %3:gr32 = MOV32ri 1
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; CHECK-GISEL: %13:gr8 = COPY %2.sub_8bit:gr32
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; CHECK-GISEL: $cl = COPY %13:gr8
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; CHECK-GISEL: %4:gr32 = SHL32rCL %3:gr32(tied-def 0), implicit-def dead $eflags, implicit $cl
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; CHECK-GISEL: %6:gr32 = AND32ri %4:gr32(tied-def 0), 13056, implicit-def dead $eflags
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; CHECK-GISEL: %7:gr32 = MOV32r0 implicit-def dead $eflags
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; CHECK-GISEL: CMP32rr %6:gr32, %7:gr32, implicit-def $eflags
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; CHECK-GISEL: %12:gr8 = SETCCr 5, implicit $eflags
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; CHECK-GISEL: TEST8ri %12:gr8, 1, implicit-def $eflags
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; CHECK-GISEL: JCC_1 %bb.4, 5, implicit $eflags
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; CHECK-GISEL: JMP_1 %bb.2
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; CHECK-GISEL: bb.6 (%ir-block.1):
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; CHECK-GISEL: bb.2.sw.epilog8:
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; CHECK-GISEL: ; predecessors: %bb.5
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; CHECK-GISEL: successors: %bb.4(0x80000000); %bb.4(100.00%)
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; CHECK-GISEL: JMP_1 %bb.4
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; CHECK-GISEL: bb.3.if.then.unreachabledefault:
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; CHECK-GISEL: bb.4.return:
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; CHECK-GISEL: ; predecessors: %bb.5, %bb.2
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; CHECK-GISEL: %9:gr32 = PHI %10:gr32, %bb.2, %11:gr32, %bb.5
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; CHECK-GISEL: $eax = COPY %9:gr32
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; CHECK-GISEL: RET 0, implicit $eax
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switch i32 %0, label %if.then.unreachabledefault [
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i32 4, label %sw.epilog8
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i32 5, label %sw.epilog8
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i32 8, label %sw.bb2
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i32 9, label %sw.bb2
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i32 12, label %sw.bb4
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i32 13, label %sw.bb4
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]
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sw.bb2:
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br label %return
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sw.bb4:
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br label %return
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sw.epilog8:
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br label %return
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if.then.unreachabledefault:
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unreachable
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return:
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%retval.0 = phi i32 [ 1, %sw.epilog8 ], [ 0, %sw.bb2 ], [ 0, %sw.bb4 ]
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ret i32 %retval.0
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}
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