ffef3e3c6a
Author: milena.vujosevic.janicic Reviewers: sdardis The code implements size reduction pass for MicroMIPS. Load and store instructions are examined and transformed, if possible. lw32 instruction is transformed into 16-bit instruction lwsp sw32 instruction is transformed into 16-bit instruction swsp Arithmetic instrcutions are examined and transformed, if possible. addu32 instruction is transformed into 16-bit instruction addu16 subu32 instruction is transformed into 16-bit instruction subu16 Differential Revision: https://reviews.llvm.org/D15144 llvm-svn: 301540
39 lines
1.3 KiB
C++
39 lines
1.3 KiB
C++
//===-- Mips.h - Top-level interface for Mips representation ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in
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// the LLVM Mips back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPS_H
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#define LLVM_LIB_TARGET_MIPS_MIPS_H
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#include "MCTargetDesc/MipsMCTargetDesc.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class MipsTargetMachine;
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class ModulePass;
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class FunctionPass;
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ModulePass *createMipsOs16Pass(MipsTargetMachine &TM);
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ModulePass *createMips16HardFloatPass(MipsTargetMachine &TM);
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FunctionPass *createMipsModuleISelDagPass(MipsTargetMachine &TM);
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FunctionPass *createMipsOptimizePICCallPass(MipsTargetMachine &TM);
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FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM);
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FunctionPass *createMipsHazardSchedule();
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FunctionPass *createMipsLongBranchPass(MipsTargetMachine &TM);
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FunctionPass *createMipsConstantIslandPass();
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FunctionPass *createMicroMipsSizeReductionPass();
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} // end namespace llvm;
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#endif
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