fd23a0c095
Currently the operand type for ATOMIC_FENCE assumes value type of a pointer in address space 0. This is fine for most targets. However for amdgcn target, the size of pointer in address space 0 depends on triple environment. For amdgiz environment, it is 64 bit but for other environment it is 32 bit. On the other hand, amdgcn target expects 32 bit fence operands independent of the target triple environment. Therefore a hook is need in target lowering for getting the fence operand type. This patch has no effect on targets other than amdgcn. Differential Revision: https://reviews.llvm.org/D32186 llvm-svn: 301215
16 lines
420 B
LLVM
16 lines
420 B
LLVM
; RUN: llc < %s | FileCheck %s
|
|
|
|
target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-A5"
|
|
target triple = "amdgcn-amd-amdhsa-amdgizcl"
|
|
|
|
; CHECK_LABEL: atomic_fence
|
|
; CHECK: BB#0:
|
|
; CHECK: ATOMIC_FENCE 4, 1
|
|
; CHECK: s_endpgm
|
|
|
|
define amdgpu_kernel void @atomic_fence() {
|
|
fence acquire
|
|
ret void
|
|
}
|
|
|