604526fe87
Before r247167, the pass manager builder controlled which AA implementations were used, exporting them all in the AliasAnalysis analysis group. Now, AAResultsWrapperPass always uses BasicAA, but still uses other AA implementations if made available in the pass pipeline. But regardless, SDAGISel is required at O0, and really doesn't need to be doing fancy optimizations based on useful AA results. Don't require AA at CodeGenOpt::None, and only use it otherwise. This does have a functional impact (and one testcase is pessimized because we can't reuse a load). But I think that's desirable no matter what. Note that this alone doesn't result in less DT computations: TwoAddress was previously able to reuse the DT we computed for SDAG. That will be fixed separately. Differential Revision: https://reviews.llvm.org/D32766 llvm-svn: 302611
115 lines
3.6 KiB
LLVM
115 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mcpu=skx | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=i686-unknown -mcpu=skx -O0 | FileCheck %s --check-prefix=X86-O0
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=skx | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=skx -O0 | FileCheck %s --check-prefix=X64-O0
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@c = external constant i8, align 1
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define void @foo() {
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; X86-LABEL: foo:
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; X86: # BB#0: # %entry
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; X86-NEXT: subl $8, %esp
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; X86-NEXT: .Lcfi0:
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; X86-NEXT: .cfi_def_cfa_offset 12
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; X86-NEXT: movzbl c, %eax
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; X86-NEXT: xorl %ecx, %ecx
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; X86-NEXT: testl %eax, %eax
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; X86-NEXT: setne %cl
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; X86-NEXT: testb %al, %al
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; X86-NEXT: setne {{[0-9]+}}(%esp)
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: cmpl %eax, %ecx
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; X86-NEXT: setle %dl
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; X86-NEXT: movl %edx, {{[0-9]+}}(%esp)
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: retl
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;
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; X86-O0-LABEL: foo:
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; X86-O0: # BB#0: # %entry
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; X86-O0-NEXT: subl $12, %esp
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; X86-O0-NEXT: .Lcfi0:
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; X86-O0-NEXT: .cfi_def_cfa_offset 16
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; X86-O0-NEXT: movb c, %al
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; X86-O0-NEXT: testb %al, %al
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; X86-O0-NEXT: setne {{[0-9]+}}(%esp)
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; X86-O0-NEXT: movzbl c, %ecx
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; X86-O0-NEXT: testl %ecx, %ecx
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; X86-O0-NEXT: setne %al
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; X86-O0-NEXT: movzbl %al, %edx
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; X86-O0-NEXT: subl %ecx, %edx
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; X86-O0-NEXT: setle %al
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; X86-O0-NEXT: # implicit-def: %ECX
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; X86-O0-NEXT: movb %al, %cl
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; X86-O0-NEXT: andl $1, %ecx
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; X86-O0-NEXT: kmovd %ecx, %k0
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; X86-O0-NEXT: kmovd %k0, %ecx
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; X86-O0-NEXT: movb %cl, %al
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; X86-O0-NEXT: andb $1, %al
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; X86-O0-NEXT: movzbl %al, %ecx
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; X86-O0-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; X86-O0-NEXT: movl %edx, (%esp) # 4-byte Spill
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; X86-O0-NEXT: addl $12, %esp
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; X86-O0-NEXT: retl
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;
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; X64-LABEL: foo:
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; X64: # BB#0: # %entry
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; X64-NEXT: movzbl {{.*}}(%rip), %eax
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; X64-NEXT: testb %al, %al
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; X64-NEXT: setne -{{[0-9]+}}(%rsp)
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; X64-NEXT: xorl %ecx, %ecx
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; X64-NEXT: testl %eax, %eax
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; X64-NEXT: setne %cl
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: cmpl %eax, %ecx
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; X64-NEXT: setle %dl
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; X64-NEXT: movl %edx, -{{[0-9]+}}(%rsp)
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; X64-NEXT: retq
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;
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; X64-O0-LABEL: foo:
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; X64-O0: # BB#0: # %entry
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; X64-O0-NEXT: movb {{.*}}(%rip), %al
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; X64-O0-NEXT: testb %al, %al
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; X64-O0-NEXT: setne -{{[0-9]+}}(%rsp)
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; X64-O0-NEXT: movzbl {{.*}}(%rip), %ecx
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; X64-O0-NEXT: testl %ecx, %ecx
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; X64-O0-NEXT: setne %al
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; X64-O0-NEXT: movzbl %al, %edx
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; X64-O0-NEXT: subl %ecx, %edx
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; X64-O0-NEXT: setle %al
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; X64-O0-NEXT: # implicit-def: %ECX
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; X64-O0-NEXT: movb %al, %cl
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; X64-O0-NEXT: andl $1, %ecx
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; X64-O0-NEXT: kmovd %ecx, %k0
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; X64-O0-NEXT: kmovd %k0, %ecx
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; X64-O0-NEXT: movb %cl, %al
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; X64-O0-NEXT: andb $1, %al
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; X64-O0-NEXT: movzbl %al, %ecx
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; X64-O0-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
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; X64-O0-NEXT: movl %edx, -{{[0-9]+}}(%rsp) # 4-byte Spill
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; X64-O0-NEXT: retq
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entry:
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%a = alloca i8, align 1
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%b = alloca i32, align 4
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%0 = load i8, i8* @c, align 1
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%conv = zext i8 %0 to i32
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%sub = sub nsw i32 0, %conv
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%conv1 = sext i32 %sub to i64
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%sub2 = sub nsw i64 0, %conv1
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%conv3 = trunc i64 %sub2 to i8
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%tobool = icmp ne i8 %conv3, 0
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%frombool = zext i1 %tobool to i8
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store i8 %frombool, i8* %a, align 1
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%1 = load i8, i8* @c, align 1
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%tobool4 = icmp ne i8 %1, 0
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%lnot = xor i1 %tobool4, true
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%lnot5 = xor i1 %lnot, true
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%conv6 = zext i1 %lnot5 to i32
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%2 = load i8, i8* @c, align 1
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%conv7 = zext i8 %2 to i32
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%cmp = icmp sle i32 %conv6, %conv7
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%conv8 = zext i1 %cmp to i32
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store i32 %conv8, i32* %b, align 4
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ret void
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}
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