959448fbd6
…ntElimination ArgumentPromotion and DeadArgumentElimination passes could change function signatures but the function name remains the same as before the transformation. This makes it hard for tracing with bpf programs where user tends to use function signature in the source. See discussion [1] for details. This patch added suffix to functions whose signatures are changed. The suffix lets users know that function signature has changed and they need to impact the IR or binary to find modified signature before tracing those functions. The suffix for ArgumentPromotion is ".argprom" and the suffixes for DeadArgumentElimination are ".argelim" and ".retelim". The suffix also gives user hints about what kind of transformation has been done. With this patch, I built a recent linux kernel with full LTO enabled. I got 4 functions with only argpromotion like ``` set_track_update.argelim.argprom pmd_trans_huge_lock.argprom ... ``` I got 1058 functions with only deadargelim like ``` process_bit0.argelim pci_io_ecs_init.argelim ... ``` I got 3 functions with both argpromotion and deadargelim ``` set_track_update.argelim.argprom zero_pud_populate.argelim.argprom zero_pmd_populate.argelim.argprom ``` [1] https://github.com/llvm/llvm-project/issues/104678
86 lines
3.2 KiB
LLVM
86 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
|
|
; RUN: opt -S -passes=argpromotion < %s | FileCheck %s
|
|
; Test that we only promote arguments when the caller/callee have compatible
|
|
; function attrubtes.
|
|
|
|
target triple = "x86_64-unknown-linux-gnu"
|
|
|
|
define internal fastcc void @no_promote_avx2(ptr %arg, ptr readonly %arg1) #0 {
|
|
; CHECK-LABEL: define {{[^@]+}}@no_promote_avx2
|
|
; CHECK-SAME: (ptr [[ARG:%.*]], ptr readonly [[ARG1:%.*]])
|
|
; CHECK-NEXT: bb:
|
|
; CHECK-NEXT: [[TMP:%.*]] = load <4 x i64>, ptr [[ARG1]]
|
|
; CHECK-NEXT: store <4 x i64> [[TMP]], ptr [[ARG]]
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
bb:
|
|
%tmp = load <4 x i64>, ptr %arg1
|
|
store <4 x i64> %tmp, ptr %arg
|
|
ret void
|
|
}
|
|
|
|
define void @no_promote(ptr %arg) #1 {
|
|
; CHECK-LABEL: define {{[^@]+}}@no_promote
|
|
; CHECK-SAME: (ptr [[ARG:%.*]])
|
|
; CHECK-NEXT: bb:
|
|
; CHECK-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
|
|
; CHECK-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
|
|
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 32 [[TMP]], i8 0, i64 32, i1 false)
|
|
; CHECK-NEXT: call fastcc void @no_promote_avx2(ptr [[TMP2]], ptr [[TMP]])
|
|
; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr [[TMP2]], align 32
|
|
; CHECK-NEXT: store <4 x i64> [[TMP4]], ptr [[ARG]], align 2
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
bb:
|
|
%tmp = alloca <4 x i64>, align 32
|
|
%tmp2 = alloca <4 x i64>, align 32
|
|
call void @llvm.memset.p0.i64(ptr align 32 %tmp, i8 0, i64 32, i1 false)
|
|
call fastcc void @no_promote_avx2(ptr %tmp2, ptr %tmp)
|
|
%tmp4 = load <4 x i64>, ptr %tmp2, align 32
|
|
store <4 x i64> %tmp4, ptr %arg, align 2
|
|
ret void
|
|
}
|
|
|
|
define internal fastcc void @promote_avx2(ptr %arg, ptr readonly %arg1) #0 {
|
|
; CHECK-LABEL: define {{[^@]+}}@promote_avx2.argprom
|
|
; CHECK-SAME: (ptr [[ARG:%.*]], <4 x i64> [[ARG1_VAL:%.*]])
|
|
; CHECK-NEXT: bb:
|
|
; CHECK-NEXT: store <4 x i64> [[ARG1_VAL]], ptr [[ARG]]
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
bb:
|
|
%tmp = load <4 x i64>, ptr %arg1
|
|
store <4 x i64> %tmp, ptr %arg
|
|
ret void
|
|
}
|
|
|
|
define void @promote(ptr %arg) #0 {
|
|
; CHECK-LABEL: define {{[^@]+}}@promote
|
|
; CHECK-SAME: (ptr [[ARG:%.*]])
|
|
; CHECK-NEXT: bb:
|
|
; CHECK-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
|
|
; CHECK-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
|
|
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 32 [[TMP]], i8 0, i64 32, i1 false)
|
|
; CHECK-NEXT: [[TMP_VAL:%.*]] = load <4 x i64>, ptr [[TMP]]
|
|
; CHECK-NEXT: call fastcc void @promote_avx2.argprom(ptr [[TMP2]], <4 x i64> [[TMP_VAL]])
|
|
; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr [[TMP2]], align 32
|
|
; CHECK-NEXT: store <4 x i64> [[TMP4]], ptr [[ARG]], align 2
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
bb:
|
|
%tmp = alloca <4 x i64>, align 32
|
|
%tmp2 = alloca <4 x i64>, align 32
|
|
call void @llvm.memset.p0.i64(ptr align 32 %tmp, i8 0, i64 32, i1 false)
|
|
call fastcc void @promote_avx2(ptr %tmp2, ptr %tmp)
|
|
%tmp4 = load <4 x i64>, ptr %tmp2, align 32
|
|
store <4 x i64> %tmp4, ptr %arg, align 2
|
|
ret void
|
|
}
|
|
|
|
; Function Attrs: argmemonly nounwind
|
|
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1) #2
|
|
|
|
attributes #0 = { inlinehint norecurse nounwind uwtable "target-features"="+avx2" }
|
|
attributes #1 = { nounwind uwtable }
|
|
attributes #2 = { argmemonly nounwind }
|